AXIOMTEK CAPA520, User Manual

Page: 73 / 75

CAPA520 Intel
®
Core
TM
Processor Family 3.5
” Board
Digital I/O 67
Appendix B
Digital I/O
B.1 About Digital I/O
The digital I/O on CPU board has 8 bits. Each bit can be set to function as input or output by
software programming. In default, all pins are pulled high with +5V level (according to main
power). The BIOS default settings are 8 inputs where all of these pins are set to 1.
CN19
Note
The maximum current @5V is up to 85mA. Each DO can be up to 10mA at least.
B.2 Digital I/O Programming
 I
2
C to GPIO PCA9554PW GPIO.

I
2
C address: 01000100.
Command byte
Command Protocol Function
0 Read byte Input port register
1 Read/write byte Output port register
2 Read/write byte Polarity inversion register
3 Read/write byte Configuration register
The command byte is the first byte to follow the address byte during a write transmission. It is
used as a pointer to determine which of the following registers will be written or read.
Pin Signal Pin Signal
1 DIO 0
2
DIO 7
3
DIO 1 4 DIO 6
5
DIO 2 6 DIO 5
7 DIO 3
8
DIO 4
9
+5V 10 GND
1