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Qorvo 1800MHz Small Cell RF Card Hardware User’s Guide
Hardware User’s Guide
Rx LNA Bypass Mechanisms
The LNA0 QPL9096 V
SD
control input (pin 5) is driven by discrete logic on the Qorvo card
combining ZCU111 GPIO signals through LPAF/M, and the comparator and AD8361
power detector. These signals are also routed to the Digital Test Pins, for scenarios where
the Qorvo card may be used in standalone mode within a test harness independent of the
ZCU111.
Figure 20
– Rx-Side LNA Control
The relation between the LNA0 Enable, Disable one Over Voltage signals is illustrated in this
table from sheet 6 of the schematic [2].
Figure 21
– Truth Table for LNA0 Operation
