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Qorvo 1800MHz Small Cell RF Card Hardware User’s Guide
Hardware User’s Guide
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5.6
SPI Controller
The programmable logic for controlling the attenuators, the power supply and the COMMS LED on
the daughter card has an SPI interface to the processor system. This allows user software in the
Zynq Processor System (PS) to access the Programmable Logic (PL) through AXI-4 to control the
DSA’s and other digital signals. This can be done through a serial port or, ultimately, from
MathWorks.
The Avnet reference design (see 5.5) software implementation uses the
spidev
Linux driver. The
Vivado project instantiates an axi_quad_spi component and the custom qorvo_spi component that
maps the interface to the control signals.
Figure 13
– The Qorvo Card SPI Interface in the Vivado Project
Most of the signals driven from this interface behave like typical GPIO in that the user can directly
drive them to logic ‘0’ or ‘1’ levels. There are two serial interfaces for the Tx and DPD attenuators
in the two channels though. This interface is not SPI, but a similar write-only interface c
alled “Serial
Addressable Mode” (SAM). See 5.4.2.
