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Revision 1.10
58 - 86
AS3542 3v2
Data Sheet, Strictly Confidential - R e g i s t e r D e f i n i t i o n
Table 49. DAC_R Register
Name
Base
Default
DAC_R
2-wire serial
00h
Offset: 0Eh
Right DAC Output Register
Configures the gain from DAC output to mixer input (
Σ
).
This register is reset when the block is disabled in AudioSet1 register (14h) or at a
AVDD27-POR. The register cannot be written when the block is disabled.
Bit
Bit Name
Default
Access
Bit Description
7:5
-
000
n/a
4:0
DAR_VOL<4:0>
00000
R/W
volume settings for right DAC output, adjustable in 32 steps @
1.5dB; gain from DAC output (N19) to mixer input (N23)
11111: 6 dB gain
11110: 4.5 dB gain
..
00001: -39 dB gain
00000: -40.5 dB gain
Table 50. DAC_L Register
Name
Base
Default
DAC_L
2-wire serial
00h
Offset: 0Fh
Left DAC Output Register
Configures the gain from DAC output to mixer input (
Σ
) and controls MUTE switch H.
This register is reset when the block is disabled in AudioSet1 register (14h) or at a
AVDD27-POR. The register cannot be written when the block is disabled.
Bit
Bit Name
Default
Access
Bit Description
7:6
-
00
n/a
5
MUTE_H_OFF
0
R/W
Control of MUTE switch H
0: DAC output is set to mute
1: normal operation
4:0
DAL_VOL<4:0>
00000
R/W
volume settings for left DAC output, adjustable in 32 steps @
1.5dB; gain from DAC output (N22) to mixer input (N26)
11111: 6 dB gain
11110: 4.5 dB gain
..
00001: -39 dB gain
00000: -40.5 dB gain