232
XMEGA B [DATASHEET]
8291B–AVR–01/2013
18.14.7 AUXDATAL – Auxiliary Data Low register
The AUXDATAL and AUXDATAH registers represent the 16-bit value, AUXDATA, that is used for multipacket transfers.
For IN endpoints, AUXDATA holds the total number of bytes sent. AUXDATA should be written to zero when setting up a
new transfer. For OUT endpoints, AUXDATA holds the total data size for the complete transfer. This value must be a
multiple of the maximum packet size, except for ISO 1023-byte endpoints.
See
“Multipacket Transfers” on page 216
for more details on setting up and using multipacket transfers.
Bit 7:0 – AUXDATA[7:0]: Auxiliary Data Low
This byte contains the eight lsbs of the auxiliary data (AUXDATA). When multipacket transfer is not used, this SRAM
location is free to use for other application data.
18.14.8 AUXDATAH – Auxiliary Data High register
Bit 7:0 – AUXDATA[15:8]: Auxiliary Data High
This byte contains the eight msbs of the auxiliary data (AUXDATA). When multipacket transfer is not used, this SRAM
location is free to use for other application data.
Bit
7
6
5
4
3
2
1
0
AUXDATA[7:0]
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
X
X
X
X
X
X
X
X
Bit
7
6
5
4
3
2
1
0
AUXDATA[15:8]
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
X
X
X
X
X
X
X
X
Summary of Contents for XMEGA B
Page 320: ...320 XMEGA B DATASHEET 8291B AVR 01 2013 Table 25 12 7 segments Character Table...
Page 321: ...321 XMEGA B DATASHEET 8291B AVR 01 2013 Table 25 13 14 segments Character Table...
Page 322: ...322 XMEGA B DATASHEET 8291B AVR 01 2013 Table 25 14 16 segments Character Table...
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