Atmel XMEGA B, User Manual

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231 XMEGA B [DATASHEET]
8291B–AVR–01/2013
18.14.4 CNTH – Counter High register

Bit 6 – AZLP: Automatic Zero Length Packet
When this bit is set, the USB module will manage the ZLP handshake by hardware. This applies to IN endpoints only.
When this bit is zero, the ZLP handshake must be managed by firmware.

Bit 6:2 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to zero
when this register is written.

Bit 1:0 – CNT[9:8]: Endpoint Byte Counter
These bits contain the two msbs of the USB endpoint counter (CNT).
18.14.5 DATAPTRL – Data Pointer Low register
The DATAPTRL and DATAPTRH registers represent the 16-bit value, DATAPTR, that contains the SRAM address to the
endpoint data buffer.

Bit 7:0 – DATAPTR[7:0]: Endpoint Data Pointer Low
This byte contains the eight lsbs of the endpoint data pointer (DATAPTR).
18.14.6 DATAPTRH – Data Pointer High register

Bit 15:0 - DPTR[15:8]: Endpoint Data Pointer High
This byte contains the eight msbs of the endpoint data pointer (DATAPTR).
Bit 7 6 5 4 3 2 1 0
+0x03
AZLP – – – – – CNT[9:8]
Read/Write R/W R R R R R R/W R/W
Initial Value X X X X X X X X
Bit 7 6 5 4 3 2 1 0
+0x04
DATAPTR[7:0]
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value X X X X X X X X
Bit 7 6 5 4 3 2 1 0
+0x05
DATAPTR[15:8]
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value X X X X X X X X