Atmel XMEGA B, User Manual

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221 XMEGA B [DATASHEET]
8291B–AVR–01/2013
18.13 Register Description – USB
18.13.1 CTRLA – Control register A

Bit 7 – ENABLE: USB Enable
Setting this bit enables the USB interface. Clearing this bit disables the USB interface and immediately aborts any
ongoing transactions.
 Bit 6 – SPEED: Speed Select
This bit selects between low and full speed operation. By default, this bit is zero, and low speed operation is selected.
Setting this bit enables full speed operation.

Bit 5 – FIFOEN: USB FIFO Enable
Setting this bit enables the USB transaction complete FIFO, and the FIFO stores the endpoint configuration table
address of each endpoint that generates a transaction complete interrupt. Clearing this bit disables the FIFO and frees
the allocated SRAM memory.

Bit 4 – STFRNUM: Store Frame Number Enable
Setting this bit enables storing of the last SOF token frame number in the frame number (FRAMENUM) register. Clearing
this bit disables the function.

Bit 3:0 – MAXEP[3:0]: Maximum Endpoint Address
These bits select the number of endpoint addresses used by the USB module. Incoming packets with a higher endpoint
number than this address will be discarded. Packets with endpoint addresses lower than or equal to this address will
cause the USB module to look up the addressed endpoint in the endpoint configuration table.
18.13.2 CTRLB – Control register B
 Bit 7:5 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to zero
when this register is written.

Bit 4 – PULLRST: Pull during Reset
Setting this bit enables the pull-up on the USB lines to also be held when the device enters reset. The bit will be cleared
on a power-on reset.

Bit 3 – Reserved
This bit is unused and reserved for future use. For compatibility with future devices, always write this bit to zero when this
register is written.
Bit 7 6 5 4 3 2 1 0
+0x00
ENABLE SPEED FIFOEN STFRNUM MAXEP[3:0]
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
+0x01
– – – PULLRST – RWAKEUP GNACK ATTACH
Read/Write R R R R/W R R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0