38.5.8. Register Access Protection
All registers with write-access are optionally write-protected by the peripheral access controller (PAC),
except the
following register:
•
Interrupt Flag Register (INTFLAG)
Write-protection is denoted by the Write-Protected property in the register description.
Write-protection does not apply to accesses through an external debugger. Refer to
PAC - Peripheral
Access Controller
chapter for details.
Related Links
PAC - Peripheral Access Controller
on page 50
38.5.9. Analog Connections
Not applicable.
38.6. Functional Description
38.6.1. Principle of Operation
The following is a high level description of the algorithm. These are the steps:
•
KeyExpansion: Round keys are derived from the cipher key using Rijndael's key schedule.
•
InitialRound:
–
AddRoundKey: Each byte of the state is combined with the round key using bitwise XOR.
•
Rounds:
–
SubBytes: A non-linear substitution step where each byte is replaced with another according
to a lookup table.
–
ShiftRows: A transposition step where each row of the state is shifted cyclically a certain
number of steps.
–
MixColumns: A mixing operation which operates on the columns of the state, combining the
four bytes in each column.
–
AddRoundKey
•
Final Round (no MixColumns):
–
SubBytes
–
ShiftRows
–
AddRoundKey
The relationship between the module's clock frequency and throughput (in bytes per second) is given by:
Clock Frequency = (Throughput/2) x (Nr+1) for 2 byte parallel processing
Clock Frequency = (Throughput/4) x (Nr+1) for 4 byte parallel processing
where Nr is the number of rounds, depending on the key length.
38.6.2. Basic Operation
38.6.2.1. Initialization
The following register is enable-protected:
•
Control A (CTRLA)
Atmel SAM L22G / L22J / L22N [DATASHEET]
Atmel-42402E-SAM L22G / L22J / L22N_Datasheet_Complete-07/2016
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