27.8.10. Configuration n
Name:
CONFIG0, CONFIG1
Offset:
0x1C + n*0x04 [n=0..1]
Reset:
0x00000000
Property:
PAC Write-Protection, Enable-Protected
Bit
31
30
29
28
27
26
25
24
FILTEN7
SENSE7[2:0]
FILTEN6
SENSE6[2:0]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bit
23
22
21
20
19
18
17
16
FILTEN5
SENSE5[2:0]
FILTEN4
SENSE4[2:0]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
FILTEN3
SENSE3[2:0]
FILTEN2
SENSE2[2:0]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
FILTEN1
SENSE1[2:0]
FILTEN0
SENSE0[2:0]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bits 3,7,11,15,19,23,27,31 – FILTENx: Filter x Enable [x = 7..0]
Value
Description
0
Filter is disabled for EXTINT[n*8+1] input.
1
Filter is enabled for EXTINT[n*8+1] input.
Bits 0:2,4:6,8:10,12:14,16:18,20:22,24:26,28:30 – SENSEx: Input Sense x Configuration
These bits define on which edge or level the interrupt or event for EXTINT[n*8+x] will be generated.
Value
Name
Description
0x0
NONE
No detection
0x1
RISE
Rising-edge detection
0x2
FALL
Falling-edge detection
0x3
BOTH
Both-edge detection
0x4
HIGH
High-level detection
0x5
LOW
Low-level detection
0x6 - 0x7 -
Reserved
Atmel SAM L22G / L22J / L22N [DATASHEET]
Atmel-42402E-SAM L22G / L22J / L22N_Datasheet_Complete-07/2016
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