4-60
AT90S8414
Preliminary
PORT A SCHEMATICS
Note that all port pins are synchronized. The synchronization latch is however, not shown in the figure.
Figure 46: PORTA Schematic Diagrams (Pins PA0 - PA7)
Port B
Port B is an 8-bit bi-directional I/O port.
Three data memory address locations are allocated for the Port B, one each for the Data Register - PORTB ($18), Data
Direction Register - DDRB ($17) and the Port B Input Pins - PINB ($16). The Port B Input Pins address is read only,
while the Data Register and the Data Direction Register are read/write.
All port pins have individually selectable pullups. The Port B output buffers can sink 20mA and thus drive LED displays
directly. When pins PB0 to PB7 are used as inputs and are externally pulled low, they will source current (IIL) if the
internal pullups are activated.
The Port B pins with alternate functions are shown in the following table:
