Hardware Manual ver.1.0.1 Pre1
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Table 5-4 CON3 Signal Assignment
Pin#
Signal
Name
I/O
Function
1
DCD1
In
Connecting to EP9307’s EGPIO1(Port A:1) pin
2
DSR1
In
Connecting to EP9307’s built-in UART1-DSR pin
3
RXD1
In
Connecting to EP9307’s built-in UART1-RXD pin
4
RTS1
Out
Connecting to EP9307’s built-in UART1-RTS pin
5
TXD1
Out
Connecting to EP9307’s built-in UART1-TXD pin
6
CTS1
In
Connecting to EP9307’s built-in UART1-CTS pin
7
DTR1
Out
Connecting to EP9307’s built-in UART1-DTR pin
8
RI1
In
Connecting to EP9307’s EGPIO0(Port A:0) pin
9
GND
Power Power supply (GND)
10 +3.3V Power
Power supply (+3.3V)
* Output current in total of CON3/CON4/CON5: 100mA Max.
5.4. CON4 (Serial Interface 2)
CON4 is an asynchronous serial interface. It is connected to UART2, CPU (EP9307).
z
Signal input/output level: 3.3V I/O level
z
Maximum data transfer rate: 230.4kbps
z
Flow
control:
None
z
FIFO: 16Byte built-in for both in and out
Table 5-5 CON4 Signal Assignment
Pin#
Signal
Name
I/O
Function
1
GPIO
In/Out Connecting to EP9307’s EGPIO2 (Port A:2) pin
2
RXD2
In
Connecting to EP9307’s built-in UART2-RXD pin
3
TXD2
Out
Connecting to EP9307’s built-in UART2-TXD pin
4 +3.3V Power
Power supply (+3.3V)
* Output current in total of CON3/CON4/CON5: 100mA Max.
5
GND
Power Power supply (GND)
5.5. CON5 (Parallel Interface)
CON5 is a general purpose input/output port. It is connected to CPU (EP9307)’s GPIO (General Purpose
I/O). It can be controlled using PADR (Port A data register I/O: 0x8084 0000), PADDR (Port A data
direction register I/O: 0x8084 0010), PBDR (Port B data register I/O: 0x8084 0004) and PBDDR (Port B
data direction register I/O: 0x8084 0014) within EP9307.
Caution: EP9307’s PortB:4 to 7 are used by the internal circuit. Do not change this setting.
