Atlantis COM-870E User Manual Download

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COM-870E

Wide Range Temperature

COM Express Type 6 CPU Module

User’s Manual

Version 1.0

2012.06

Summary of Contents for COM-870E

Page 1: ...COM 870E Wide Range Temperature COM Express Type 6 CPU Module User s Manual Version 1 0 85 2012 06 85...

Page 2: ...This page is intentionally left blank...

Page 3: ...press 10 2 2 Block Diagram 12 2 3 Connectors 13 2 4 COM Express AB Connector bottom side 14 2 5 COM Express CD Connector bottom side 15 2 6 The Installation Paths of CD Driver 16 2 7 Heatsink Installa...

Page 4: ...3 4 Boot Settings 50 3 5 Security 51 3 6 Save Exit 53 3 7 AMI BIOS Checkpoints 54 3 7 1 Checkpoint Ranges 54 3 7 2 Standard Checkpoints 55 Appendix 63 Appendix A I O Port Address Map 64 Appendix B In...

Page 5: ...1 Introduction 1 Chapter 1 Introduction Chapter 1 Introduction...

Page 6: ...t is in compliance with the directives of the Union European EU A Certificate of Compliance is available by contacting Technical Support This product has passed the CE test for environmental specifica...

Page 7: ...cal and Electronic Equipment RoHS Directive 2002 95 EC The above mentioned directive was published on 2 13 2003 The main pur pose of the directive is to prohibit the use of lead mercury cadmium hexava...

Page 8: ...power source when you want to work on the inside 2 Hold the board by the edges and try not to touch the IC chips leads or cir cuitry 3 Use a grounded wrist strap when handling computer components 4 Pl...

Page 9: ...e use misuse of or inability to use this product Vendor will not be liable for any claim made by any other related party Vendors disclaim all other warranties either expressed or implied including but...

Page 10: ...e sure that the following materials have been shipped 1 x COM 870E COM Express CPU Module 1 x Driver CD 1 x Quick Installation Guide COM 870E 827E Intel Celeron 827E WT COM Express CPU module HS 65M2...

Page 11: ...x DDI ports Ethernet controller 1 x Intel 82579LM Gigabit Ethernet PHY BIOS AMI PnP Flash BIOS Storage 2 x Serial ATA ports w 600MB s HDD transfer rate 2 x Serial ATA ports w 300MB s HDD transfer rate...

Page 12: ...8 Introduction 1 11 Board Dimensions 2 4 00 4 00 48 46 87 00 95 00 35 56 73 67 4 00 30 00 71 58 41 00 76 00 125 00 55 68 86 01 32 6 12 45 35 9 2 SODIMM 2 6 6 5 Sandy Bridge Processor PCH QM67 Unit mm...

Page 13: ...9 Installation 2 Chapter 2 Installation Chapter 2 Installation...

Page 14: ...Row AB which is required provides pins for PCI Express SATA LVDS LCD channel LPC bus system and power management VGA LAN and power and ground interfaces Row CD which is optional provides SDVO and lega...

Page 15: ...four rows of pins 440 pins Connector placement and most mounting holes have transparency between Form Factors The differences among the Module Type 6 and COM 870E are summarized in table below Module...

Page 16: ...DDR3 sockets 8 GPIO SPI Bus SPI Bus SATA2 3 300Gb s USB Port 0 7 5 x PCIex1 SATA0 1 600Gb s HD Audio Link SMBus PCIex1 GbE LAN Intel 82579LM GbE controller LPC I F Dual Channels 24 bit LVDS Analog RGB...

Page 17: ...13 Installation 2 3 Connectors Top side Sandy Bridge Processor PCH QM67 COM Express CD Connector COM Express AB Connector Bottom side COM Express AB Connector COM Express CD Connector...

Page 18: ...0 A46 VCC_RTC A47 EXCD0_PERST A48 EXCD0_CPPE A49 LPC_SERIRQ A50 GND A51 PCIE_TX5 A52 PCIE_TX5 A53 GPI0 A54 PCIE_TX4 A55 B56 PCIE_RX4 B57 GPO2 B58 PCIE_RX3 B59 PCIE_RX3 B60 GND B61 PCIE_RX2 B62 PCIE_RX...

Page 19: ...39 DDI3_PAIR0 C40 GND FIXED C41 DDI3_PAIR1 C42 DDI3_PAIR1 C43 DDI3_HPD C44 RSVD C45 DDI3_PAIR2 C46 DDI3_PAIR2 C47 RSVD C48 DDI3_PAIR3 C49 DDI3_PAIR3 C50 GND FIXED C51 PEG_RX0 C52 PEG_RX0 C53 TYPE0 C54...

Page 20: ...Windows XP 64bit Graphics Drivers Windows XP64 Graphics Drivers winxp64 Management Engine EmETXe i67M2 ME RAID EmETXe i67M2 IRST Windows 7 Driver Path CHIPSET EmETXe i67M2 CHIPSET LAN EmETXe i67M2 ET...

Page 21: ...oth sides from thermal pad first of all be sure not to pinch or mold the thermal pad and then put it as right picture 3 You may also apply thermal pad to their memory module But be aware to put it on...

Page 22: ...m over together and secure the first 3 screws as left picture Overturn again to secure the rest as right picture 4 After everything is settled down please assemble heatsink with CPU module according t...

Page 23: ...19 BIOS 3 Chapter 3 BIOS Chapter 3 BIOS...

Page 24: ...ow keys to highlight a particular configuration screen from the top menu bar or use the down arrow key to access and configure the information below NOTE In order to increase system stability and perf...

Page 25: ...he Day automatically changes when you set the date The date format is Day Sun to Sat Month 1 to 12 Date 1 to 31 Year 1999 to 2099 3 2 Advanced Settings Launch PXE OpROM Enable or disable the boot opti...

Page 26: ...may be not effective with some OS ACPI Sleep State Select the highest ACPI sleep state the system will enter when the SUSPEND button is pressed The choice Suspend Disabled S1 CPU Stop Clock S3 Suspen...

Page 27: ...Enabled for Windows XP and Linux OS optimized for Hyper threading Technology and disabled for other OS OS not optimized for Hyper threading Technology When disabled only one thread per enabled core i...

Page 28: ...s The choice Disable IDE Default RAID Enable or disable SATA devices It allows you to select the operation mode for SATA controller IDE Set the Serial ATA drives as Parallel ATA storage devices RAID C...

Page 29: ...heft Technology Enable or disable Intel Anti Theft Technology function in BIOS Intel Anti Theft Technology Recovery Enter Intel AT Suspend Mode Set the number of times Recovery attempted will be allow...

Page 30: ...nfiguration MeBx Selection Screen OEMFLag Bit 2 Enable Disable MEBx selection screen BIOS Hotkey Pressed OEMFLag Bit 1 Enable Disable BIOS hotkey press Verbose Mebx Output OEMFLag Bit 3 Enable Disable...

Page 31: ...mer Set timer to wait before sending ASF_GET_BOOT_OPTIONS PET Progress User can enable disable PET Events progress to received PET events or not Un Configure ME OEMFLag Bit 15 Un Configure ME without...

Page 32: ...e connected The choice Enabled Default Auto Disabled EHCI Hand off Allow you to enable support for operating systems without an EHCI hand off feature Do not disable the BIOS EHCI Hand Off option if yo...

Page 33: ...USB transfer time out The time out value for control bulk and interrupt transfers Default setting 20 sec Device reset time out USB mass storage device start unit command time out Default setting 20 se...

Page 34: ...ration You can use this item to set up or change the Super IO configuration for FDD controllers parallel ports and serial ports Power On After Power Failure Specify what state to go to when power is r...

Page 35: ...rial port The choice Enabled Disabled Change Settings Use the Change Settings option to change the serial port s IO port address and interrupt address The choice Auto IO 3F8h IRQ 4 IO 3F8h IRQ 3 4 5 6...

Page 36: ...e Auto IO 378h IRQ 5 IO 378h IRO 5 6 7 10 11 12 IO 378h IRQ 5 6 7 10 11 12 IO 278h IRQ 5 6 7 10 11 12 IO 38Ch IRQ 5 6 7 10 11 12 Device Mode The choice Standard Parallel Port Mode EPP Mode ECP Mode EP...

Page 37: ...I C3 report to OS Enable Disable CPU C7 ACPI C3 report to OS Long duration power limit Short duration power limit Long duration maintained TCC active offset Long duration power limit in Watts 0 means...

Page 38: ...34 BIOS 3 3 Chipset This section allows you to configure and improve your system also set up some system features according to your preference...

Page 39: ...IOS 3 3 1 System Agent SA Configuration Enable NB CRID Enable or disable NB CRID WorkAround CHAP Device B0 D7 F0 Enable or disable SA CHAP Device Thermal Device B0 D4 F0 Enable or disable SA Thermal D...

Page 40: ...ics Keep IGD enabled based on the option GTT Size Select the GTT Size 1MB 2MB Aperture Size Select the Aperture Size 128MB 256MB 512MB DVMT Total Gfx Mem Select DVMT5 0 Total Graphic Memory size used...

Page 41: ...on VGA modes will be supported only on primary display Primary IGFX Boot Display Select LCD panel used by Internal Graphics Device by selecting the appropri ate setup item VBIOS Default 640x480 LVDS 2...

Page 42: ...f Other options are Hardware Spread is controlled by chip Software Spread is controlled by BIOS Panel Color Depth Select the LFP panel color depth 18 Bit 24 Bit Active LFP Select the Active LFP Config...

Page 43: ...e or disable DMI Vc1 Vcp Vcm DMI Extended Synch Control Enable or disable DMI Extended Synchronization DMI Gen 2 Enable or disable DMI Gen 2 DMI Link ASPM Control Enable or disable the control of Acti...

Page 44: ...figure PEG1 B0 D1 F1 Gen1 Gen2 The choice Auto Gen1 Gen2 PEG2 Gen X Configure PEG2 B0 D1 F2 Gen1 Gen2 The choice Auto Gen1 Gen2 PEG3 Gen X Configure PEG3 B0 D6 F0 Gen1 Gen2 The choice Auto Gen1 Gen2 N...

Page 45: ...s ASPM L1 ASPM L0sL1 De emphasis Control Configure the De emphasis control on PEG The choice 6 dB 3 5 dB DIMM profile Select DIMM timing profile that should be used The choice Default DIMM profile XMP...

Page 46: ...serEnable support RMT Crosser Support Enable or disable MRC fast boot MRC Fast Boot Force Cold Reset Force cold reset or choose MRC cold reset mode when cold boot is required during MRC execution NOTE...

Page 47: ...to the processor via PECI EXTT via TS on Board Enable or disable routing TS on Board s ALERT and THERM to EXTTS pins on the PCH EXTT via TS on DIMM Enable or disable routing TS on DIMM s ALERT to EXTT...

Page 48: ...44 BIOS GT Power Management Control RC6 Render Standby GT Overclocking Support Check to enable render standby support Enable or disable GT Overclocking Support...

Page 49: ...led Auto Azalia will be enabled if present disabled otherwise Wake on RING Enable or disable Wake on RING WOR Computer will start up simply by ap plying power to a connected external modem if WOR is e...

Page 50: ...46 BIOS USB Configuration EHCI1 2 Control the USB EHCI USB2 0 functions One EHCI controller must always be enabled USB Ports Per Port Disable Control Enable or disable each of the USB ports 0 9...

Page 51: ...Clock Gating for each root port DMI Link Extended Synch Control The control of Extended Synch on SB side of the DMI Link Subtractive Decode Enable or disable Subtractive Decode DMI Link ASPM Control...

Page 52: ...s Root Port PCI Express Root Port 1 8 Configure PEG1 B0 D1 F1 Gen1 Gen2 The choice Auto Gen1 Gen2 PEG1 Gen X ASPM Support Set the ASPM Level to Disabled L0s L1 L0sL1 Auto Force L0 Force all links to L...

Page 53: ...nable or disable Root PCI Express System Error on Non Fatal Error SENFE Enable or disable PCI Express Hot Plug Hot Plug Reserved I O 4k 8k 12k 16k 20k Range for this Root Bridge Reserved I O Enable or...

Page 54: ...es whether the Num Lock key should be activated at boot up Hard Drive BBS Priorities This allows you to set the hard drive boot priority The BIOS will attempt to arrange the hard disk boot sequence au...

Page 55: ...firm the password Type the password again and press Enter You may also press ESC to abort the selection and not enter a password To disable a password just press Enter when you are prompted to enter t...

Page 56: ...your system is rebooted This would prevent unauthorized use of your computer You can determine when the password is required within the BIOS Features Setup Menu and its Security option If the Security...

Page 57: ...on this item and it asks for confirmation prior to executing this command Save Changes and Reset Pressing Enter on this item and it asks for confirmation Save configuration changes and exit setup Pres...

Page 58: ...xecution up to and including memory detection 0x30 0x4F PEI execution after memory detection 0x50 0x5F PEI errors 0x60 0x8F DXE execution up to BDS 0x90 0xCF BDS execution 0xD0 0xDF DXE errors 0xE0 0x...

Page 59: ...ding 0x05 OEM initialization before microcode loading 0x06 Microcode loading 0x07 AP initialization after microcode loading 0x08 North Bridge initialization after microcode loading 0x09 South Bridge i...

Page 60: ...nitialization North Bridge module specific 0x19 Pre memory South Bridge initialization is started 0x1A Pre memory South Bridge initialization South Bridge module specific 0x1B Pre memory South Bridge...

Page 61: ...Memory North Bridge initialization North Bridge module specific 0x3B Post Memory South Bridge initialization is started 0x3C Post Memory South Bridge initialization South Bridge module specific 0x3D P...

Page 62: ...0xE2 Video repost 0xE3 OS S3 wake vector call 0xE4 0xE7 Reserved for future AMI progress codes S3 Resume Error Codes 0xE8 S3 Resume Failed 0xE9 S3 Resume PPI not Found 0xEA S3 Resume Boot Script Error...

Page 63: ...x68 PCI host bridge initialization 0x69 North Bridge DXE initialization is started 0x6A North Bridge DXE SMM initialization is started 0x6B North Bridge DXE initialization North Bridge module specific...

Page 64: ...M DXE initialization codes 0x90 Boot Device Selection BDS phase is started 0x91 Driver connecting is started 0x92 PCI Bus initialization is started 0x93 PCI Bus Hot Plug Controller Initialization 0x94...

Page 65: ...0xB1 Runtime Set Virtual Address MAP End 0xB2 Legacy Option ROM Initialization 0xB3 System Reset 0xB4 USB hot plug 0xB5 PCI bus hot plug 0xB6 Clean up of NVRAM 0xB7 Configuration Reset reset of NVRAM...

Page 66: ...s entering S2 sleep state 0x03 System is entering S3 sleep state 0x04 System is entering S4 sleep state 0x05 System is entering S5 sleep state 0x10 System is waking up from the S1 sleep state 0x20 Sys...

Page 67: ...63 Appendix Appendix Appendix...

Page 68: ...er 0x000000C0 0x000000DF Direct memory access controller 0x00000020 0x00000021 Programmable interrupt controller 0x00000024 0x00000025 Programmable interrupt controller 0x00000028 0x00000029 Programma...

Page 69: ...ces 0x00000080 0x00000080 Motherboard resources 0x00000092 0x00000092 Motherboard resources 0x000000B2 0x000000B3 Motherboard resources 0x00000680 0x0000069F Motherboard resources 0x00001000 0x0000100...

Page 70: ...0FF Numeric data processor 0x0000F130 0x0000F137 Standard Dual Channel PCI IDE Controller 0x0000F120 0x0000F123 Standard Dual Channel PCI IDE Controller 0x0000F110 0x0000F117 Standard Dual Channel PCI...

Page 71: ...PCI standard PCI to PCI bridge IRQ 11 Video Controller VGA Compatible IRQ 11 PCI PCI Simple Communications Controller IRQ 5 Ethernet Controller IRQ 5 SM Bus Controller IRQ 22 Microsoft UAA Bus Driver...

Page 72: ...ns Controller 0xF7C00000 0xF7C1FFFF Ethernet Ethernet Controller 0xF7C28000 0xF7C28FFF Ethernet Ethernet Controller 0xF7C27000 0xF7C273FF Standard Enhanced PCI to USB Host Con troller 0xF7C20000 0xF7C...

Page 73: ...FFFFF Motherboard resources 0xFED20000 0xFED3FFFF Motherboard resources 0xFED90000 0xFED93FFF Motherboard resources 0xFED45000 0xFED8FFFF Motherboard resources 0xFEE00000 0xFEEFFFFF Motherboard resour...

Page 74: ...11R s Add 6eh int i j printf Fintek F75111 DIO LED TEST Program Ver 0 1 n printf Warning This tools is test only n Index 10 GPIO1x Output pin control SMB_Byte_WRITE SMB_PORT_AD SMB_DEVICE_ADD 0x10 0xf...

Page 75: ...ear delay 10 outportb SMPORT 04 DeviceID 1 clear outportb SMPORT 03 REG_INDEX clear outportb SMPORT 02 0x48 read_byte delay 10 printf 02x inportb SMPORT 05 SMB_Byte_WRITE int SMPORT int DeviceID int R...

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