ASUS C-P6ND User’s Manual
17
IV. BIOS SOFTWARE
IV
. BIOS
(Chipset Features)
Chipset Features Setup
This “Chipset Features Setup” option controls the configuration of the board’s Chipset.
Control keys for this screen are the same as for the previous screen.
Auto Configuration
The default setting of 60ns DRAM sets the optimal timings for items 2 through 6 for
60ns DRAM modules. If you are using 70ns DRAM modules, you must change this
item to 70ns DRAM. Select Disabled to change items 2 through 6. See pages 12-13
for DRAM installation information.
DRAM Refresh Type
Leave on default setting of RAS Only as this is the current DRAM standard (other-
wise CBR).
CPU-to-PCI IDE Posting
Leave on default setting of Enabled so that the CPU to PCI IDE posting cycles are
treated as normal I/O write transactions.
USWC Write Posting
Leave on default setting of Enabled to allow USWC write posting during
I/O bridge access.
CPU-to-PCI Write Post
The default setting of Enabled will increase the efficiency of the PCI bus and speed
up the execution in the processor.
PCI-to-DRAM Pipeline
The default of Enabled will increase the bandwidth of the path between the PCI and
the DRAM to enhance the PCI bus efficiency and DRAM accessing.
PCI Burst Write Combining
The default setting of Enabled will increase the efficiency of PCI bus by combining
several CPU to PCI write cycles into one. VGA performance is increased by this
action.
Read-Around-Write
The default setting of Enabled will increase the execution efficiency of the proces-
sor. It allows the processor to execute read commands out of order if there is no
dependence between these read and other write commands.
