Asus AAEON GENE-BT05, User Manual, Page: 115 / 129

Appendix A – Watchdog Timer Programming 101
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A.2 Watchdog Sample Program
*********************************************************************// WDT I/O
operation relative definition (Please reference to Table 1)
#define WDTAddr 0xA00 // WDT I/O base address
Void WDTWriteByte(byte Register, byte Value);
byte WDTReadByte(byte Register);
Void WDTSetReg(byte Register, byte Bit, byte Val);
// Watch Dog relative definition (Please reference to Table 2)
#define DevReg 0x00 // Device configuration register
#define WDTRstBit 0x80 // Watchdog WDTRST# (Bit7)
#define WDTRstVal 0x80 // Enabled WDTRST#
#define TimerReg 0x05 // Timer register
#define PSWidthBit 0x00 // WDTRST# Pulse width (Bit0:1)
#define PSWidthVal 0x01 // 25ms for WDTRST# pulse
#define PolarityBit 0x02 // WDTRST# Signal polarity (Bit2)
#define PolarityVal 0x00 // Low active for WDTRST#
#define UnitBit 0x03 // Unit for timer (Bit3)
#define ModeBit 0x04 // WDTRST# mode (Bit4)
#define ModeVal 0x01 // 0:level 1: pulse
#define EnableBit 0x05 // WDT timer enable (Bit5)
#define EnableVal 0x01 // 1: enable
#define StatusBit 0x06 // WDT timer status (Bit6)
#define CounterReg 0x06 // Timer counter register
*********************************************************************