X399D8A-2T
44
45
English
TwrwrScL
The minimum number of cycles from the last clock of virtual CAS of the first write-
burst operation to the clock in which CAS is asserted for a following write-burst
operation in the same chipselect in the same bank group.
Refresh Cycle Time (tRFC)
Configure the Refresh command period.
Refresh Cycle Time 2 (tRFC2)
The x2 Fine Granularity Refresh mode Refresh command period.
Refresh Cycle Time 4 (tRFC4)
The x4 Fine Granularity Refresh mode Refresh command period.
CAS Write Latency (tCWL)
Configure CAS Write Latency.
Read to Precharge (tRTP)
The number of clocks that are inserted between a read command to a row pre-charge
command to the same rank.
Trdwr
The minimum number of cycles from the last clock of virtual CAS of the first read-
burst operation to the clock in which CAS is asserted for a following write-burst
oepration.
Twrrd
The minimum number of cycles from the last clock of virtual CAS of the first write-
burst operation to the clock in which CAS is asserted for a following write-burst
oepration.
TwrwrSc
The minimum number of cycles from the last clock of virtual CAS of the first write-
burst operation to the clock in which CAS is asserted for a following write-burst
oepration in the same chipselect.
TwrwrSd
The minimum number of cycles from the last clock of virtual CAS of the first write-
burst operation to the clock in which CAS is asserted for a following write-burst
oepration in the same DIMM.