English
64
4.4.7 AMD CBS
Zen Common Options
RedirectForReturnDis
From a workaround for GCC/C000005 issue for XV Core on CZ A0, setting MSRC001_1029
Decode Configuration (DE_CFG) bit 14 [DecfgNoRdrctForReturns] to 1.
L2 TLB Associativity
0 - L2 TLB ways [11:8] are fully associative. 1 - =L2 TLB ways [11:8] are 4K-only.
Platform first Error Handling
Enable/disable PFEH, cloak individual banks, and mask deferred error interrupts from each
bank.
Core Performance Boost
Disable CPB.
Enable IBS
Enables IBS through MSRC001_1005[42] and disables SpecLockMap through
MSRC001_1020[54].
Global C-state Control
Controls IO based C-state generation and DF C-states.
Summary of Contents for B450M/ac R2.0
Page 1: ......
Page 20: ...English 14 3 ...
Page 22: ...English 16 3 4 C P U _ F A N 1 ...
Page 23: ...B450M ac R2 0 17 English Installing the AM4 Box Cooler SR2 1 2 ...
Page 24: ...English 18 3 ...
Page 26: ...English 20 Installing the AM4 Box Cooler SR3 1 2 ...
Page 27: ...B450M ac R2 0 21 English 3 4 ...
Page 28: ...English 22 5 C P U _ F A N 1 4 pin FAN cable ...
Page 78: ...English 72 4 4 8 AMD PBS The AMD PBS menu accesses AMD specific features ...
