Artesyn MVME5100, Programmer'S Reference Manual, Page: 48 / 318

Product Data and Memory Maps
MVME5100 Single Board Computer Programmer’s Reference (6806800H17B )
48
An 8-bit status register, accessible through the External Register Set port, defines the status of
the Module.
SYSCON_
System Controller Mode bit. If this bit is set, the module is not the master of its PCI bus (PCI bus
0). If this bit is cleared, the module is the master of its PCI bus (PCI bus 0). This bit always reads
as cleared (“0”).
BAUDOUT
This is the baud output clock of the TL16C550 UART, referenced to the 1.8432 MHz UART
oscillator. This signal can be used as a timing reference.
FUSE
This bit provides the current state of the FUSE signal. If set, at least one of the planar fuses or
polyswitches is open.
1.5.9 MODFAIL Bit Register
The MVME5100 implementation of this register is fully compliant with the PowerPlusII
programming specification with exceptions to bit RD5, as indicated in the table.
Table 1-11 MVME5100 Status Register
REG Status Register - FEF88080h
BIT RD0 RD1 RD2 RD3 RD4 RD5 RD6 RD7
FIELD
FU
SE
BA
UDOU
T
SY
SC
ON_
OPER R R R R R R R R
RESET X X X X X X X 0
REQUIRED OR OPTIONAL