Artesyn MVME5100, Programmer'S Reference Manual, Page: 230 / 318

System Memory Controller (SMC)
MVME5100 Single Board Computer Programmer’s Reference (6806800H17B )
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3.3.3 Detailed Register Bit Descriptions
The sections describe the registers and their bits in detail.
The possible operations for each bit in the register set are as follows:
The possible states of the bits after local and power-up reset are as defined below.
The topics discussed in the section are the following:

Vendor/Device Register on page 232

Revision ID/General Control Register on page 232
All empty bit fields are reserved and read as zeros.
All status bits are shown in italics.
All control bits are shown with underline.
All control-and-status bits are shown with italics and underline.
Table 3-10 Possible Operations for Each Bit in the Register
Operation Description
R The bit is a read only status bit.
R/W The bit is readable and writable.
R/C The bit is cleared by writing a one to itself.
Table 3-11 Possible States of the Bits
State Description
P The bit is affected by power-up reset (PURST_).
L The bit is affected by local reset (RST_).
X The bit is not affected by reset.
V The effect of reset on the bit is variable.