Artesyn MVME5100, Programmer'S Reference Manual, Page: 202 / 318

System Memory Controller (SMC)
MVME5100 Single Board Computer Programmer’s Reference (6806800H17B )
202
When the width status bit is set, the block’s ROM/Flash is considered to be 64 bits wide, where
each half of the SMC interfaces with 32 bits. In this mode, the following rules are enforced:

only aligned, 4-byte writes should be attempted (all other sizes are ignored), and

all reads are allowed (multiple accesses to the ROM/Flash device are performed for burst
reads).
More information about ROM/Flash is found in the following sections in this chapter.
In order to place code correctly in the ROM/Flash devices, address mapping information is
required. Table 2-3 shows how PPC60x addresses map to the ROM/Flash addresses when
ROM/Flash is 16 bits wide. Table 2-4 shows how they map when Flash is 64 bits wide.
Table 3-3 PPC60x to ROM/Flash (16 Bit Width) Address Mapping
PPC60x A0-A31 ROM/Flash A22-A0 ROM/Flash Device Selected
$XX000000 $000000 Upper
$XX000001 $000001 Upper
$XX000002 $000002 Upper
$XX000003 $000003 Upper
$XX000004 $000000 Lower
$XX000005 $000001 Lower
$XX000006 $000002 Lower
$XX000007 $000003 Lower
$XX000008 $000004 Upper
$XX000009 $000005 Upper
$XX00000A $000006 Upper
$XX00000B $000007 Upper
$XX00000C $000004 Lower
$XX00000D $000005 Lower
$XX00000E $000006 Lower