Artesyn MVME5100, Programmer'S Reference Manual, Page: 164 / 318

Hawk PCI Host Bridge & Multi-Processor Interrupt Controller
MVME5100 Single Board Computer Programmer’s Reference (6806800H17B )
164
The register fields are defined as follows:
REG
Register Number. Configuration Cycles: Identifies a target double word within a target’s
configuration space. This field is copied to the PCI AD bus during the address phase of a
Configuration cycle.
Special Cycles: This field must be written with all zeros.
FUN
Function Number. Configuration Cycles: Identifies a function number within a target’s
configuration space. This field is copied to the PCI AD bus during the address phase of a
Configuration cycle.
Special Cycles: This field must be written with all ones.
DEV
Device Number. Configuration Cycles: Identifies a target’s physical PCI device number. Refer to
the section on
Generating PCI Cycles for a description of how this field is encoded.
Special Cycles: This field must be written with all ones.
BUS
Reset $00
0 0
$00 $0 $00
1
$00
Table 2-66 Perspective from the PPC bus in Little Endian mode
Offset $CFC $CFD $CFE $CFF
Bit (DL)
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
Name CONFIG_ADDRESS
EN
BUS DEV FUN REG
Operation
R/W
R R/W R/W R/W R/W
R R
Reset
1 $00 $00 $00
$0 $00
0 0
Table 2-65 Perspective from the PPC bus in Big Endian mode (continued)
Offset $CF8 $CF9 $CFA $CFB
Bit (DH)
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31