Artesyn Embedded Technology ATCA-7490, Installation And Use Manual

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IPMI Feature Set
ATCA-7490 Installation and Use (6806800U11F)
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The IPMI controller can be upgraded via KCS, LAN, or IPMB interface. To ensure that the payload
is not interrupted during IPMI firmware upgrade, the IPMI controller stores all operational
information (e-keying, hot-swap state, last events to be queued, graceful shutdown timeout,
latest pin settings and so on) in non-volatile storage.
9.2.1.2 IAP Component
The BMR-A2F-AMCc IPMI building block from Pigeon Point is implemented within an FPGA
logic block from Microsemi Inc. Its fabric can be upgraded via HPM.1 firmware upgrade. This
process is referred to In Application Programming (IAP) upgrade.
As there is no possibility of crisis recovery, Artesyn does not recommend to upgrade this
component without any need.
9.2.1.3 FPGA Component
The Lattice Glue Logic FPGA is equipped with two SPI flashes; one is designated "Active", the
other one is "Backup".
During power-up, the IPMC protects the "Active" SPI flash by de-selecting it, once the FPGA
boots successfully. Thus, HPM.1 specific logic updates can be performed only to the "Backup"
SPI flash. By explicitly prohibiting FPGA logic updates to the "Active" SPI flash, crisis recovery is
guaranteed always. Both FPGA flashes cannot be overwritten incorrectly even by mistake.
The information about which FPGA flash is active, is provided using the Boot Bank Supervision
Sensor. For more details, see
Boot Bank Supervision Sensor on page 337 .
Besides HPM.1 manual rollback, there is also a possibility to switch the banks without
upgrading an HPM.1 firmware at all. For details see
System Boot Options Commands on page
263 .
The HPM.1 command,
Activate Firmware
does not reboot the payload firmware
unconditionally. Instead the blade can be power-cycled gracefully to activate the new
firmware.
A payload cold reset is not enough to execute a new FPGA component. In this
particular case a power cycle is required.