AT32WB415
Series Reference Manual
2022.04.13
Page 84
Ver 2.00
7
Multiplexed function I/Os (IOMUX)
7.1 Introduction
AT32WB415 series support up to 28 bi-directional I/O pins. Each of the I/O pins feature communication,
control and data collection. In addition, their main features also include:
Supports general-purpose I/O (GPIO) or multiplexed I/O (IOMUX), which will be detailed in this
chapter.
Can be configured as multiplexed function input/output by setting GPIOx_CFGLR or
GPIOx_CFGHR register
Most pins support output mapping for several peripherals. Select different peripheral input/output
through IOMUX register
Supports external interrupts
7.2 Functional overview
7.2.1
IOMUX structure
As multiplexed function input, the I/O port should be configured as input modes (floating, pull-up and
pull-down input).
To enable multiplexed function output, the port must be configured as multiplexed function output mode
(push-pull or open-drain) by setting GPIOx_CFGLR or GPIOx_CFGHR register. In this case, the pin is
disconnected from GPIO controller, and controlled by IOMUX controller, instead.
To
achieve bidirectional multiplexed function, the port needs to be configured as multiplexed function
output modes (push-pull or open-drain), controlled by IOMUX controller.
In MUX output mode, it is possible that an I/O pin is used as an output
for several peripherals. Select
the required multiplexed function output through IOMUX registers. However, when a pin is programmed
as MUX IO without activating the corresponding peripheral , its output will not specified.
Figure 7-1
Basic structure of IOMUX basic structure
IO
ESD
protect
SMT trigger
PU
PD
output data
output enable
input enable
input data
push/pull
strength control
analog
input/output
A
H
B
b
u
s
IO
M
U
X
c
o
n
tr
o
l
Single IO
Analog
module
Peripheral
Module
