AT32F413
Series Reference Manual
2022.06.27
Page 207
Rev 2.00
Figure 14-28
Block diagram of general-purpose TMR10/11
Trigger
controller
TMRxCLK from RCC
C1IFP1
DIV prescaler
+/- CNT Counter
Period register
Stop, clear
prescaler
Output
control
C1ORAW
C1OUT
TMRX_CH1
TMRx_CH1
Enable
couting
C1IRAW
Edge detector
Input filter
CxDT
input
CxDT
output
14.2.3 TMRx functional overview
14.2.3.1 Count clock
The count clock of general-purpose timers can be provided by the internal clock (CK_INT), external clock
(external clock mode A) and internal trigger input (ISx)
Internal clock (CK_INT)
By default, the CK_INT divided by the prescaler is used to drive the counter to start counting.
Figure 14-29
Control circuit with CK_INT divided by 1
CK_INT
TMREN
COUNTER
12
11
13
14
15
16
00
01
02
03
04
05
06
07
External clock
(
TMR9 only
)
The counter clock can be provided by TRGIN signal.
When SMSEL=3’111, external clock mode A is selected. Set the STIS[2: 0] bit to select TRGIN signal to
drive the counter to start counting.
Figure 14-30
Block diagram of external clock mode A
C1IFP2
C1IFP1
C1INC
ISx
CK_DIV
Trigger select
Slave mode
control
External clock
control
CI1RAW
Filter
Edge
detector
C2IF_Rising
C2IF_Falling
Polarity
selection
Note: The delay between the signal on the input side and the actual clock of the counter is due to the
synchronization circuit.