BeMicro CV A9
FPGA Development Board
Hardware Reference Guide
Altera's 28nm Low Cost FPGA Solution
v1.2
1
Downloaded from
Arrow.com.
Page 1: ...BeMicro CV A9 FPGA Development Board Hardware Reference Guide Altera s 28nm Low Cost FPGA Solution v1 2 1 Downloaded from Arrow com ...
Page 2: ...ne V E FPGA 9 Configuration Options 9 Clock Circuitry 10 General User Input Output 10 DDR3 Memory 12 Ethernet Interface 14 EEPROM 15 Micro SD Card 15 40 Pin Prototyping Headers 16 80 Pin Card Edge Connector 19 Power Supply 22 3 Additional Information 23 Board Revision History 23 Document Revision History 24 2 Downloaded from Arrow com Downloaded from Arrow com ...
Page 3: ...DSP and logic intensive applications such as Software Defined Radio SDR data acquisition and video processing BeMicro CV A9 is compatible with the Arrow BeScope digital oscilloscope SDRstickTM SDR front end boards and the Terasic MTL LCD module For a complete list of products compatible with BeMicro CV A9 board see the BeMicro CV A9 Partner Pack at http www arrow com bemicro Users can easily migra...
Page 4: ...ded USB BlasterTM II for use with the Quartus II Programmer Separate JTAG configuration header High Speed Networking Gigabit Ethernet PHY Micrel KSZ9021 RJ 45 Ethernet connector Clocking circuitry 50 MHz 1 8V oscillator 24 MHz 2 5V 3 3V oscillator Memory 1Gbit DDR3 SDRAM 64M x 16 1Kbit 128 x 8 two wire Serial EEPROM Micro SD card slot General user input output 8 user LEDs 2 user pushbuttons 4 user...
Page 5: ...1 1 shows a block diagram of the BeMicro CV A9 FPGA development board Figure 1 1 BeMicro CV A9 Block Diagram 5 Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com ...
Page 6: ...A9 Development Board Figure 1 3 shows a bottom view of the BeMicro CV A9 FPGA development board Figure 1 3 Bottom View BeMicro CV A9 Development Board 6 Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com ...
Page 7: ...hen touching the board 2 Board Components This chapter introduces the major components on the Be Micro CV A9 FPGA development board Figure 2 1 and Figure 2 2 illustrate the component locations Figure 2 1 Major component locations Top View 7 Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Dow...
Page 8: ...neral User Input Output DDR3 Memory Ethernet Interface EEPROM Micro SD Card 40 Pin Prototyping Headers 80 Pin Card Edge Connector Power Supply 8 Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com ...
Page 9: ...USB 2 0 PHY device U9 and an Altera MAX V 5M80ZE64 CPLD U10 to allow FPGA configuration using a USB cable This USB cable connects directly between the USB mini B connector on the board and a USB port on a PC running the Quartus II software The embedded USB Blaster in the MAX V EPM80ZE64 CPLD normally masters the JTAG chain FPGA Programming using EPCQ Compatible Configuration PROM The low cost N25Q...
Page 10: ...this interface is selectable using the VCCIO_SEL jumper General User Input Output The development board includes switches for user input and LEDs for status output This section describes these elements LED Outputs There are multiple LED indicators on the board but only LED1 LED8 are available for use through FPGA I O Driving the FPGA output to a logic 0 will illuminate the LED Driving a logic 1 tu...
Page 11: ...User Defined Push Buttons Board references S1 and S2 are available for user defined discrete input Pressing and holding down the switch will set the FPGA input pin to logic 0 Releasing the switch will set it to logic 1 There are no board specific functions for these general user push buttons Table 2 4 lists the user defined push button schematic signal names and their corresponding Cyclone V E FPG...
Page 12: ...1 Gb 64 M x 16 DDR3 device The device is connected to the Cyclone V E FPGA so that the internal Hard Memory Controller HMC can be used The Cyclone V E FPGA speedgrade will determine the maximum speed at which the DDR3 can be accessed as shown in Table 2 6 Table 2 6 Hard Memory Controller Maximum Frequency of Operation Temperature and Speed Grade Maximum Frequency of Controller MHz C6 400 C7 333 C8...
Page 13: ...ank address bus B6 DDR3_CASn 1 5V SSTL Class I Column address strobe J9 DDR3_CLK_P Differential 1 5 V SSTL Class I Clock H9 DDR3_CLK_N Differential 1 5 V SSTL Class I Clock F14 DDR3_CKE 1 5V SSTL Class I Clock Enable E9 DDR3_CSn 1 5V SSTL Class I Chip Select G11 DDR3_DM0 1 5V SSTL Class I Data Mask J17 DDR3_DM1 1 5V SSTL Class I Data Mask E12 DDR3_DQ0 1 5V SSTL Class I Data bus bit 0 byte lane 0 D...
Page 14: ... Reset in F7 DDR3_WEn 1 5V SSTL Class I Write Enable Ethernet Interface The BeMicro CV A9 board includes a Micrel KSZ9021 10 100 1000 Ethernet PHY and RJ45 connector Altera s Triple Speed Ethernet MAC soft IP core can be implemented inside the Cyclone V FPGA to connect to the PHY through its RGMII interface Table 2 8 Ethernet PHY pin assignments signal names and functions FPGA Pin Number Schematic...
Page 15: ...I O Standard Description P16 EEPROM_SDA 2 5 V or 3 3 V 1 Serial Data Address P17 EEPROM_SCL 2 5 V or 3 3 V 1 Serial Clock Note 1 I O voltage for this interface is selectable using the VCCIO_SEL jumper Micro SD Card The BeMicro CV A9 board includes a Micro SD card slot with x4 data interface to the FPGA Table 2 10 lists the FPGA pin assignments signal names and functions for the Micro SD card Table...
Page 16: ... or 3 3 V 1 5 R16 GPIO6 2 5 V or 3 3 V 1 6 R21 GPIO7 2 5 V or 3 3 V 1 7 R17 GPIO8 2 5 V or 3 3 V 1 8 T22 GPIO1 2 5 V or 3 3 V 1 9 AA9 GPIO_D 2 5 V or 3 3 V 1 10 NA VCC5P0 NA 11 NA GND NA 12 T19 DIFF_TX_P9 2 5 V or 3 3 V 1 13 T20 DIFF_TX_N9 2 5 V or 3 3 V 1 14 AA8 LVDS_TX_O_N3 2 5 V or 3 3 V 1 15 AB8 LVDS_TX_O_P3 2 5 V or 3 3 V 1 16 Y11 LVDS_TX_O_N0 2 5 V or 3 3 V 1 17 AA12 LVDS_TX_O_P0 2 5 V or 3 ...
Page 17: ... 3 V 1 36 U12 DIFF_RX_P2 2 5 V or 3 3 V 1 37 U11 DIFF_RX_N2 2 5 V or 3 3 V 1 38 R11 DIFF_RX_P1 2 5 V or 3 3 V 1 39 R10 DIFF_RX_N1 2 5 V or 3 3 V 1 40 Note 1 I O voltage for this interface is selectable using the VCCIO_SEL jumper 17 Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded f...
Page 18: ...ND NA 17 NA GND NA 18 NA NC NA 19 NA NC NA 20 NA NC NA 21 NA NC NA 22 NA NC NA 23 NA NC NA 24 NA GND NA 25 NA GND NA 26 NA NC NA 27 NA NC NA 28 AA10 GPIO_C 2 5 V or 3 3 V 1 29 18 Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded fr...
Page 19: ... further guidance consult the add on card s documentation along with the BeMicro CV A9 Schematic at https parts arrow com item detail arrow development tools bemicrocva9 Table 2 13 lists the card edge connector J2 pin assignments signal names and functions Table 2 13 Board Reference Information for Card Edge Connector J2 FPGA Pin Number Schematic Signal Name I O Standard J2 Pin Number NA VCC3P3 NA...
Page 20: ...44 2 5 V or 3 3 V 1 28 Y17 EG_P12 2 5 V or 3 3 V 1 29 P14 EG_P45 2 5 V or 3 3 V 1 30 AB18 EG_P13 2 5 V or 3 3 V 1 31 NA GND NA 32 NA GND NA 33 R14 EG_P46 2 5 V or 3 3 V 1 34 AA18 EG_P14 2 5 V or 3 3 V 1 35 T12 EG_P47 2 5 V or 3 3 V 1 36 AA19 EG_P15 2 5 V or 3 3 V 1 37 T13 EG_P48 2 5 V or 3 3 V 1 38 20 Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arr...
Page 21: ...G_P26 2 5 V or 3 3 V 1 61 V20 EG_P58 2 5 V or 3 3 V 1 62 V21 EG_P27 2 5 V or 3 3 V 1 63 U20 EG_P59 2 5 V or 3 3 V 1 64 U22 EG_P28 2 5 V or 3 3 V 1 65 P18 EG_P60 2 5 V or 3 3 V 1 66 U21 EG_P29 2 5 V or 3 3 V 1 67 NA No Connect NA 68 NA No Connect NA 69 NA No Connect NA 70 NA No Connect NA 71 21 Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com D...
Page 22: ...D core and I O power VCC2P5 2 5 FPGA 2 5V I O bank power FPGA I O pre driver Banks 7A 8A and JTAG I O power VCC2P5F 2 5 FPGA Auxiliary power PLL analog power filtered from VCC2P5 VCC3P3 3 3 FPGA 3 3V I O bank power VCCPGM 3 3 FPGA configuration input buffer power filtered from VCC3P3 VCCIO_POWER 2 5 or 3 3 FPGA I O bank power Banks 3A 3B 4A 5B I O pre driver power Banks 3A 3B 5A 5B The BeMicro CV ...
Page 23: ... releases of the Arrow Electronics BeMicro CV A9 Cyclone V FPGA Development Board Release Date Version Description September 2014 Initial release Limited production run 23 Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arro...
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