ARM Prospector P1100, User Manual, Page: 34 / 154

Hardware Description
3-2 Copyright © ARM Limited 2000. All rights reserved. ARM DUI 0122A
3.1 SA-1100 CPU
The Intel StrongARM SA-1100 is a general purpose 32-bit RISC processor which
includes:
• 16Kbyte instruction cache
• 8Kbyte data cache
• 16-entry minicache
• memory management unit
• write buffer.
The SA-1100 is software compatible with the ARM v4 architecture.
In addition to the processor core, the SA-1100 incorporates system support modules:
• memory and PCMCIA controller
— supporting EDO DRAM, and SRAM or flash
— PCMCIA control signals (available for expansion).
• system control module
— 28 General Purpose Input/Output (GPIO) pins
— interrupt controller
— real-time clock, watchdog, and interval timer
— power management controller
— reset controller
— two on-chip oscillators.
• peripheral control module:
— 6-channel DMA controller
— LCD controller with programmable screen resolution,
— five dedicated serial ports.
The core can be clocked at a range of clock frequencies (between 59 and 191.7MHz)
with the upper limit determined by the speed grade of CPU fitted. The SA-1100
operates at a fixed core voltage of 1.5V and a fixed input/output voltage of 3.3V (10%
tolerance).
Note
The IO is not 5V tolerant, buffering must be provided to isolate the part from any 5V
logic domains. 74LCX devices are used as level converters. These parts have a +3V
supply but are 5V tolerant. Their output switching range is within the TTL switching
threshold. They are used to buffer 3V domain signals to the expansion connectors.
The SA-1100 variant used is packaged in a 256-pin mini-Ball Grid Array (mBGA).