ARM Corstone SSE-300, Manual

Page: 39 / 64

Arm® Corstone™ SSE -300 with Cortex®- M55 and Ethos™ -U55 :
Example Subsystem for MPS3 - Application Note AN547
DAI 0547C
Issue C
6 FPGA Secure Privilege Control
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Page 39 of 64
6 FPGA Secure Privilege Control
The SSE-300 Subsystem Secure Privilege and Non-Secure Privilege Control Block provide expansion
security control signals to control the security gating units outside the subsystem. The following table lists
the connectivity of the system security extension signals.
Component Name Component signals Security Expansion Signals
USER MSC
msc_irq SMSCEXPSTATUS[3:1]
msc_irq_clear SMSCEXPCLEAR[3:1]
cfg_nonsec NSMSCEXP[0]
apb_ppc_irq SPERIPHPPCEXPSTATUS[0]
apb_ppc_clear SPERIPHPPCEXPCLEAR[0]
APB PPC EXP 0 cfg_sec_resp SECRESPCFG
cfg_non_sec PERIPHNSPPCEXP0[15:0]
cfg_ap PERIPHPPPCEXP0[15:0]
APB PPC EXP 1
apb_ppc_irq SPERIPHPPCEXPSTATUS[1]
apb_ppc_clear SPERIPHPPCEXPCLEAR[1]
cfg_sec_resp SECRESPCFG
cfg_non_sec PERIPHNSPPCEXP1[15:0]
cfg_ap PERIPHPPPCEXP1[15:0]
APB PPC EXP 2
apb_ppc_irq SPERIPHPPCEXPSTATUS[2]
apb_ppc_clear SPERIPHPPCEXPCLEAR[2]
cfg_sec_resp SECRESPCFG
cfg_non_sec PERIPHNSPPCEXP2[15:0]
cfg_ap PERIPHPPPCEXP2[15:0]
AHB PPC EXP 0
ahb_ppc_irq SMAINPPCEXPSTATUS[0]
ahb_ppc_clear SMAINPPCEXPCLEAR[0]
cfg_sec_resp SECRESPCFG
cfg_non_sec MAINNSPPCEXP0[15:0]
chg_ap MAINPPPCEXP0[15:0]
AHB PPC EXP 1
ahb_ppc_irq SMAINPPCEXPSTATUS[1]
ahb_ppc_clear SMAINPPCEXPCLEAR[1]
cfg_sec_resp SECRESPCFG
cfg_non_sec MAINNSPPCEXP1[15:0]
chg_ap MAINPPPCEXP1[15:0]
MPC SSRAM secure_error_irq SMPCEXPSTATUS[2]
Table 6-1 : Security Expansion signals connectivity