Anritsu MX183000A, Operation Manual, Page: 45 / 226

3.2 Jitter Tolerance Test Connection Procedure
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3.2 Jitter Tolerance Test Connection Procedure
MP1800A-x02,x32
MU181500B
Ext Clock Input
Jittered Clock Output
I,Q Output Jittered Clock Output
Jitter Modulation
Source
Control PC
Ethernet
MU183020A
Ext Clock Input
Data Output 1
Data Output 1
Data Output 2
Data Output 2
28G/32G PPG
Clock Output
Clock Signal Generator
MU181000A/B-x01
Clock Output
Trigger Output
Ext I,Q
To Device Under Test
MU183040A/B
Data Input 1
Data Input 1
Data Input 2
Data Input 2
28G/32G ED
Ext Clock Input
From Device Under Test
Figure 3.2-1 Jitter Tolerance Test Connection Procedure