Anritsu 37 D Series, Maintenance Manual, Page: 56 / 190

3-4
DIGITAL SUBSYSTEM
ASSEMBLIES
The following sections briefly describe the major assemblies that com-
prise the VNA Digital Subsystem. The digital subsystem provides all
system control, I/O interface, digital signal processing, and data pre-
sentation functions. The major assemblies that comprise the VNA digi-
tal PCB subsystem are listed below (refer to Figure 3-4):
q
A9, Main Processor PCB
q
A13, I/O Interface #1 PCB
q
A14, I/O Interface #2 PCB
q
A15, Graphics Processor PCB
q
A16, Hard Disk PCB
q
A18, Rear Panel Interface
q
Rear Panel Assembly
q
Front Panel Assembly
q
Floppy Disk Assembly
q
A24, VME Bus Terminator PCB
A9 Main Processor
PCB Assembly
The major components that comprise the A9 Main Processor PCB are:
q
68040 Microprocessor (w/ integrated co-processor)—This is the
CPU for the 37XXXD system.
q
16 MB SDRAM—This is the main system memory. This memory
is volatile (non-battery backed). During normal operation, it
stores the 37XXXD software that is loaded from disk at
power-up.
q
8 KB BBRAM—This auxiliary memory chip contains a back-up
battery that is continuously recharged whenever power is ap-
plied. (The back-up battery has a four year minimum life span.)
This chip also contains real time and date clock functions. It is
used to store low level boot-up parameters, ALC calibration data,
source frequency calibration data, and service log header data.
q
512 KB SRAM—This auxiliary memory is backed-up by a
non-rechargeable Lithium battery that provides 200 days (maxi-
mum) of power-off protection. It is used to store current and
saved front panel setups, trace/normalization data, current RF
calibration data, current sweep frequency data, flat power cali-
bration data, and the service log error list.
q
VME Bus interface chip—This chip is used to interface the Main
Processor PCB to the A13, A14, and A15 digital PCBs (via the
VME bus interface).
q
SCSI Bus interface—This chip is used to interface the Main Pro-
cessor PCB to the A16 Hard Disk PCB.
DIGITAL SUBSYSTEM ASSEMBLIES THEORY OF OPERATION
3-20 37XXXD MM