Anritsu 37 D Series, Maintenance Manual, Page: 45 / 190

37XXXD MM 3-9
THEORY OF OPERATION SYSTEM OVERVIEW
Source
Quadrupler
Module
(SQM)
Switched Filter w/
Amps
Down
Converter
A21A2 PCB
Sampler/ Buffer Amp
(Receiver Down
Conversion Module)
Source
Doubler
Module
(SDM)
3 dB Pad
Source
Quadrupler
Module
(SQM)
MUX Coupler
(Reverse)
3 dB Pad
Transfer Switch
(Ref A/ Ref B
control)
37 GHz
Hi Pass Filter
37 GHz
Hi Pass Filter
Front Panel
RF Cable
(2)
Shaped
Pad
MUX Coupler
(Forward)
A21A1 PCB A4 PCB
Ref IF Processor
SPDT Switch
J4
J5
Ref A
Ref B
38 to 65 GHz
Ref A
38 to 65 GHz
Ref B
A8 PCB
Source Lock/ RF
Component Control
Power Amp
Second LO
(A2 PCB)
(25 to 272 MHz)
First LO
(A1 PCB)
(357 to 536 MHz)
Ref A
40 MHz to
38 GHz
Ref B
40 MHz to 38 GHz
Shaped
Pad
40 MHz to 65 GHz (Ref A)
40 MHz to 65 GHz (Ref B)
ALC Control PCB
49808-3
Ref A
J7 J8
Ref B
2.5 MHz CW
2.5 MHz CW
J4 J2 J1
J1
J3
Ref B
38 to 65 GHz
DC Voltage
DC Voltage (6 MHz / Volt)
J4
J4 J4
J5
J5
DCV
DCV
J1
J3
J2
YIG Control
Digital and Analog Control
40 MHz to
2 GHz
6.3 to
8.3 GHz
40 MHz to
19 GHz
9.5 to
16.25 GHz
40 MHz to 38 GHz
Control
Control of SPDT
Switch, Transfer Switch,
Buffer Amp
J5
J5 J3
J1
3 dB Pad
3 dB Pad
16.8 GHz
Lowpass
filter
(1) Ref A = a1, Ref B = a2.
(2) Option 15 units only.
Front Panel
RF Cable
(2)
YIG
Oscillator
2 to 20 GHz
15 dB Pad
Ref A
38 to 65 GHz
Ref A
Ref B
Control
from A8 PCB
Control
from A8 PCB
Control
from A8 PCB
Control
Control
J1
J3 J1
10 MHz
from A7
10 MHz from
A7 PCB
Notes:
Figure 3-5.
Source Lock Signal Paths for 50 GHz and 65 GHz Models