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37XXXD MM
3-7
THEORY OF OPERATION
SYSTEM OVERVIEW
Transfer
Switch
Source
Doubler
Module
(SDM)
A21A2 PCB
Switched
Filter
with Amps
Sampler/
Buffer Amplifier
(Receiver Down
Conversion Module)
A2 PCB
(Second Local
Osc.)
YIG
Osc.
(2 to 20 GHz)
Power
Amplifier
Down
Converter
A1 PCB
(First Local
Osc.)
A21A1 PCB
A4 PCB
A8 PCB
A7 PCB
(1)
2.5 MHz
2.5 MHz
40 MHz to
2 GHz
J2
(top)
Digital and
Analog
Control
J1
Test Signals to
Ports 1 & 2
Ref A
(3)
Ref B
(3)
Ref A
Ref B
J3
J1
J4
J2
J1
Tuning Currents
and Control
Notes:
(1) Not present on 20 GHz models.
(3) Ref A = a1, Ref B = a2.
J5
J3
Control from A8 PCB
10 MHz
10 MHz
Control from A8 PCB
Control Lines to
Transfer Switch
and Buffer Amp
40 MHz to
20 GHz
40 MHz to
40 GHz
Control
Control
Control
ALC Control
Ref A
Ref B
J8
J7
2.5 MHz
DC Voltage
40 MHz to 40 GHz
J1
6.3 to 8.3 GHz
15 dB
Pad
Pad
(4)
Pad
(4)
Front Panel RF
Cable (2)
Front Panel RF
Cable (2)
Pad
(4)
Pad
(4)
(2) Option 15 units only.
(4) Fixed attenuator may be present. Value will vary with model.
J3
Figure 3-3.
Source Lock Signal Paths for 20 GHz and 40 GHz Models
Summary of Contents for 37 D Series
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