Anritsu 37 D Series, Maintenance Manual, Page: 42 / 190

3-6 37XXXD MM
SYSTEM OVERVIEW THEORY OF OPERATION
Transfer
Switch
Source
Doubler
Module
(SDM)
(1)
A21A2 PCB
Switched
Filter w/
Amps
Sampler/ Buffer Amplifier
(Receiver Down
Conversion Module)
A2 PCB
(Second
Local
Osc.)
YIG
Osc.
(2 to 20 GHz)
Power
Amplifier
Down
Converter
A1 PCB
(First Local
Osc.)
A21A1 PCB
A3 PCB
A5 PCB
(A/D Converter)
A8 PCB
Test B
2.5 MHz
Test A
2.5 MHz
40 MHz to
2 GHz
J2
(top)
Digital and
Analog
Control
J1
Ref Signals
for Source
Lock
Test B
(3)
Test B
Tuning Currents
and Control
Notes:
(1) Not present on 20 GHz models.
(3) When using S21, S12 or Non-Ratio (diagnostics) displays. Test A = b1, Test B = b2.
J2
J7
Control Lines
from A8 PCB
Control Lines to
Transfer Switch
and Buffer Amp
40 MHz to
20 GHz
40 MHz to
40 GHz
Control
Control
Control
ALC Control
J1
6.3 to 8.3 GHz
15 dB
Pad
Front Panel
RF Cable
(2)
Front
Panel RF
Cable (2)
(2) Option 15 units only.
(4) Not present on 372XXD models.
Port
1
Bias
Tee
(4)
Port 2
Bias Tee
(4)
Port 2
Coupler
Port 1
coupler
DUT
Port 1
Step
Att
(4)
Port 2
Step
Att
(4)
Front
Panel
RF
Cable
(2)
Front
Panel
RF
Cable
(2)
Test A
(5)
(5)
(5) Fixed attenuator may be present . Value will vary with model.
(5)
(5)
A6 PCB
DC
Voltage
DC
Voltage
Digital Data to
Processor
J5 J2
J2
J4
J3
J3
J2
J3
J4
J4
Test A
(3)
A7 PCB
10 MHz to A3, A5, A6
PCB’s
Test B
(3)
Test A
(3)
J3
Figure 3-2.
Test Signal Paths for 20 GHz and 40 GHz Models