Anritsu 37 D Series, Maintenance Manual, Page: 102 / 190

6-6
SOURCE LOCK
THRESHOLD
This procedure uses the VNA internal diagnostics and calibration
menus to adjust the source lock threshold of the phase-lock loop. Per-
form this calibation procedure:
q
If the Low Power Phase Lock Test (Chapter 4) fails.
q
Anytime the Port 1 ALC Calibration is done.
q
If the A4 PCB is replaced.
q
If the A8 PCB is replaced.
q
If the BBRAM chip on the A9 Processor PCB is replaced and the
Source Lock Threshold calibration data was not previously saved
on disk (that is, data is not available for recall from a floppy
disk).
q
If the Sampler/Down Conversion Module is replaced.
Calibration
Procedure
Perform the following steps:
Equipment Required:
None
NOTE
Allow the VNA to warm-up for at least 30 minutes and per-
form the ALC calibration (Section 6-5) prior to performing
this calibration.
Procedure:
Step 1. If recalibrating a 50 or 65 GHz model , install broadband
terminations to both ports or install a throughline between
ports.
Step 2. Press the Option Menu key (Enhancement key group) to dis-
play the OPTIONS menu.
Step 3. Select DIAGNOSTICS from the menu, then select in se-
quence: H/W CALIBRATIONS | SOURCE LOCK
THRESHOLD CALIBRATION.
Step 4. Follow the directions displayed on the VNA’s screen, until
the calibration is completed. (If the instrument is a 65 GHz
model, the calibration will take several hours.)
SOURCE LOCK THRESHOLD ADJUSTMENTS
6-14 37XXXD MM