Feature Configuration
ANCA Motion
DS619-0-00-0019 - Rev 0
95
10
Figure 10-5 Digital Output Configuration Flow Chart
KEY
Common Processing
of Digital Output
Hardware Level Digital Output
General Purpose Digital Output
For each bit ‘i’ (0 to 5)
of IDN33350
Physical Digital Output ‘i+1’ (1 to 6)
Ethercat == OP?
No
Yes
Ethercat == OP?
No
Yes
Bit ‘i’ > 0?
Yes
No
XOR
Digital Output Source
IDN List. The value of
bit ‘i’ contained by the
IDN stored in element
‘i’ of IDN 33350
Digital Output
GP Level Safe
State IDN
33353 bit ‘i’
XOR
Digital
Output
Invert Mask
IDN 33351
bit ‘i’
AND
Digital Output
Source Bitmask
IDN 33352 bit ‘i’
Digital Output Data
IDN 33345 bit ‘i’
XOR
Digital Output
Polarity
IDN 33344 bit ‘i’
Bit ‘i’ == 0?
Yes
No
Set bit ‘i’ = 0
Set bit ‘i’ = 1
Bit ‘i’ == 0?
Digital Output HW
Level Safe State
IDN 33354 bit ‘i’
No
B type
Set bit
A type
Set bit
Yes
Digital Output
Source IDN List IDN
33350 bit ‘i’
A type
Set bit
B type
Set bit
B type
Set bit
A type
Set bit
Test
Data IDN
Process