EVAL-ADAU1467Z
UG-1134
Rev. A (Draft) | Page 17 of 55
SERIAL AUDIO DATA INPUT AND OUTPUT
Input Serial Port 0 and Input Serial Port 3 are available on
Header J8. Output Serial Port 2 and Output Serial Port 3 are
available on Header J9. These headers are standard, two column
headers with 0.1 inch (2.54 mm) spacing. There is one signal
column and one ground column. Always connect at least one
ground wire between the header and the external signal source
or sink to maintain proper signal integrity. A standard ribbon
cable provides signal integrity over longer distances because
signal wires are separated by ground wires.
In addition to the signals from the serial audio data ports,
Header J8 includes connections to the unregulated 5 V power
supply and the regulated 3.3 V power supply. Header J9 includes a
buffered connection to MCLK, the master clock from the
CLKOUT pin from the
Figure 40. Serial Input Port Headers, J8
Figure 41. Serial Output Port Headers, J9 and J19
Figure 42. Power and CLKOUT Header, J8
Figure 43. MCLK Input Header, J3
MULTIPURPOSE PINS (MPx)
The multipurpose pins on the
can be used for general-
purpose inputs or outputs when configured as such using the
control registers. Of the 14 multipurpose pins, three
are connected to switches that pull the pins low or tie them
high, three are on test points and connected to high impedance
inputs to LED drivers, and two are available headers. The
remaining six pins are used for other functionality and are,
therefore, unavailable for use as multipurpose pins.
The signal from the LRCLK_OUT1/MP5 pin is fed to an inverter
that drives LED D4. The signal from the LRCLK_OUT3/MP9 pin
is fed to an inverter that drives LED D3. The signal from the
LRCLK_IN1/MP11 pin is fed to an inverter that drives LED D5.
The five multipurpose pins available for use as general-purpose
inputs or outputs, along with their access points on the evaluation
board, are described in Table 3.
Identify other GPIO pins:
•
Mic canvas connector
DRAFT