Analog Devices LTC6955 Demo Manual Download | Manualshive

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DEMO MANUAL DC2611A

Rev. 0

Change C56 & C57
to 0 ohm resistors

DC2611A RECONFIGURATION

Figure 2. Alternate Configuration, Locking LTC6955 Outputs to an External PLL/VCO

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Summary of Contents for LTC6955

Page 1: ...ks are the property of their respective owners making them suitable to drive 50Ω impedance instru ments The remaining four differential outputs are termi nated with 100Ω A calibration path is provided to aid in accurate LTC6955 propagation delay measurements The calibration path can be also reconfigured as a DC path which allows for a convenient method of locking the LTC6955 outputs to an external...

Page 2: ...cture are known to generate spurs on low jitter clock outputs 2 For poor phase noise results verify the phase noise specifications of the input signal and the phase noise measurement instrument Traditional signal sources and spectrum analyzers have higher phase noise than the LTC6955 and will degrade measurement results To measure phase noise performance it is recommended to use a low jitter oscil...

Page 3: ...Ω impedance instruments connect OUTx to the instrument and OUTx to a 50Ω termination or vice versa The remaining five outputs OUT9 OUT7 OUT5 OUT3 and OUT2 are terminated with a 100Ω resistor on board To connect these outputs to a 50Ω instrument remove the 100Ω termination and install the appropriate SMAs and AC blocking capacitors Refer to LTC6955 data sheet for differential termination options Al...

Page 4: ...4 DEMO MANUAL DC2611A Rev 0 Change C56 C57 to 0 ohm resistors DC2611A RECONFIGURATION Figure 2 Alternate Configuration Locking LTC6955 Outputs to an External PLL VCO ...

Page 5: ...OUT1 OUT1 J11 and J12 SMA Connectors OUT0 OUT0 J9 and J10 SMA Connectors OUT9 OUT9 Two Outputs Not Connected J3 and J4 SMA Not Populated On board differential 100Ω termination OUT7 OUT7 J7 and J8 SMA Not Populated OUT5 OUT5 J19 and J20 SMA Not Populated OUT3 OUT3 J15 and J16 SMA Not Populated OUT2 OUT2 J13 and J14 SMA Not Populated IN Input Not Connected J26 SMA Connector Default Not connected see...

Page 6: ...6 DEMO MANUAL DC2611A Rev 0 PCB LAYOUT Top Layer ...

Page 7: ...0 8 1 JP1 CONN HEADER MALE 1X3 2mm THT WURTH ELEKTRONIK 62000311121 9 16 J1 J2 J5 J6 J9 J12 J17 J18 J21 J26 CONN SMA 50Ω EDGE LAUNCH CON SMA R CCSJ 142 0701 851 10 0 J3 J4 J7 J8 J13 J16 J19 J20 CONN SMA 50Ω EDGE LAUNCH CON SMA R OPT 11 2 J27 J28 CONN JACK BANANA KEYSTONE 575 4 12 2 R1 R2 RES CHIP 10k 1 10W 1 0402 VISHAY CRCW040210K0FKED 13 1 R3 RES CHIP 100k 1 10W 1 0402 VISHAY CRCW0402100KFKED 14...

Page 8: ...R10 RES CHIP 30Ω 1 16W 1 0402 VISHAY CRCW040230R0FKED 8 1 U1 I C ULTRALOW JITTER 11 OUTPUT FANOUT BUFFER QFN52UKG 7X8 LINEAR TECH LTC6955IUKG DC2611A3 B Required Circuit Components 1 1 DC2611A3 GENERAL BOM 2 0 C58 C61 CAP 0402 OPT 3 2 C59 C60 CAP C0G 1pF 50V 10 0402 MURATA GJM1555C1H1R0CB01 4 1 FB1 IND 47ΩS AT 100MHz FERRITE BEAD 0201 TDK MMZ0603D470ET000 5 0 R8 R9 R10 R19 RES 0402 OPT 6 1 R11 IND...

Page 9: ...NOTICE LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER SUPPLIED SPECIFICATIONS HOWEVER IT REMAINS THE CUSTOMER S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR AS...

Page 10: ...disclose or transfer any portion of the Evaluation Board to any other party for any reason Upon discontinuation of use of the Evaluation Board or termination of this Agreement Customer agrees to promptly return the Evaluation Board to ADI ADDITIONAL RESTRICTIONS Customer may not disassemble decompile or reverse engineer chips on the Evaluation Board Customer shall inform ADI of any occurred damage...

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