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User Guide

EVAL-ADMV4640

EVALUATION BOARD SCHEMATICS

Rev. A | 7 of 10

Figure 9. EVAL-ADMV4640Z Schematic, Page 1

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Summary of Contents for EVAL-ADMV4640

Page 1: ...TION The EVAL ADMV4640Z evaluation board incorporates the ADMV4640 low dropout LDO regulators and the EVAL SDP CS1Z SDP S controller board to allow simplified efficient evalu ation of the ADMV4640 The SDP S controller board allows the configuration of the ADMV4640 register map through the Analysis Control Evaluation ACE software The LDO regulators allow the EVAL ADMV4640Z to be powered by a 5 V si...

Page 2: ...iption 1 Evaluation Board Photograph 1 Evaluation Board Hardware 3 Evaluation Board Software Quick Start Procedures 4 Installing the ACE Software and ADMV4640 Plugins and Drivers 4 Configuring the Board 4 ADMV4640 Block Diagram and Functions 5 Evaluation Board Schematics 7 Ordering Information 9 Bill of Materials 9 Notes 10 REVISION HISTORY 7 2022 Revision A Initial Version ...

Page 3: ...MV4640 chip When evaluating the ADMV4640 device connect the IF input to an RF signal generator The EVAL ADMV4640Z runs on a 5 V dc supply Connect the 5 V dc supply to the VCC_5V test point and the ground to the GND1 test point Figure 2 shows the block diagram of the EVAL ADMV4640Z lab bench setup Figure 2 Lab Bench Setup ...

Page 4: ...ble to the PC and then to the SDP S controller board 3 Connect the 5 V clip lead on the power supply to the red VCC_5V test point on the EVAL ADMV4640Z and connect the GND clip lead on the power supply to the black GND1 test point The power supply current limiting must be set to approximately 500 mA 4 Open the ACE software The ADMV4640 Board plugin ap pears in the Attached Hardware section Double ...

Page 5: ...o set the LNASTG2_BIAS_CONTROL bit Bit 3 Register 0x100 When the LNA Stage 2 Enable switch is highlighted the LNASTG2_BIAS_CONTROL bit is enabled When the LNA Stage 2 Enable switch is not highlighted the LNASTG2_BIAS_CONTROL bit is disabled H Use the DSA scroll to choose a value or enter a value in the text box to set the SEL_DSA_ATTEN bit Bit 4 0 Register 0x300 I Click the IF Amp Enable switch re...

Page 6: ...ch is highlighted the RDIV2_EN bit is enabled When the Divide by 2 switch is not highlighted the RDIV2_EN bit is disabled O Click the AMUX switch represented by Label O to set the SEL_AMUX bit Bit 2 0 Register 0x301 There are two options for AMUX AGPIO and temperature sensor PTAT P ADC blocks Click Read from ADC to readback ADC values See the ADMV4640 data sheet for further details Q Click Proceed...

Page 7: ...User Guide EVAL ADMV4640 EVALUATION BOARD SCHEMATICS analog com Rev A 7 of 10 Figure 9 EVAL ADMV4640Z Schematic Page 1 ...

Page 8: ...User Guide EVAL ADMV4640 EVALUATION BOARD SCHEMATICS analog com Rev A 8 of 10 Figure 10 EVAL ADMV4640Z Schematic Page 2 ...

Page 9: ...7 C40 C41 C43 C46 C48 C49 C51 4 7 µF ceramic capacitors Murata GRM155R60J475ME87D 14 C2 C4 C9 C10 C12 C13 C16 C21 C29 C36 to C39 C44 Do not install TBD0402 TBD0402 7 CPOUT CSB MUXOUT SCLK SDI SDO VTUNE Test points yellow Components Corporation TP 104 01 04 1 GND1 Test point black Components Corporation TP 104 01 00 4 J1 J2 MUX_OU REF_IN SMA connectors Johnson 142 0701 851 1 J3 120 pin connector Hi...

Page 10: ...uation Board or termination of this Agreement Customer agrees to promptly return the Evaluation Board to ADI ADDITIONAL RESTRICTIONS Customer may not disassemble decompile or reverse engineer chips on the Evaluation Board Customer shall inform ADI of any occurred damages or any modifications or alterations it makes to the Evaluation Board including but not limited to soldering or any other activit...

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