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EVAL-ADGM1004SDZ

 User Guide 

UG-1462

 

Rev. 0 | Page 9 of 18 

MEASURING SWITCH PERFORMANCE 

Figure 1 shows the EVAL-ADGM1004SDZ connection diagram. 
Apply a VDD supply (V

DD

) to the EVAL-ADGM1004SDZ to 

measure the performance of the switch. The links are set 
according to the switch under test (see Table 4). After selecting 
the desired channel and the state of the channel, use a network 
analyzer to collect the switch performance data. Terminate the 
RFx edge connectors of unused switch channels to 50 Ω loads to 
achieve the full performance of the channel under test. 

The EVAL-ADGM1004SDZ comes with the CALIBRATION 
THRU calibration transmission line on the PCB. This calibration 
transmission line removes the insertion loss and phase offset of 
the PCB transmission lines connecting to the switch from the 
measurement. Figure 7 shows the calibration transmission line, 
and Figure 8 shows the calibration transmission line insertion 
loss and return loss up to 16 GHz. The calibration transmission 
line is exactly the same length as the distance from any one RFx 
connector to the RFx pin of the device, plus the distance from 
the RFC connector to the RFC pin of the device (see Label A 
and Label B in Figure 9). 

17

271

-006

 

Figure 7. EVAL-ADGM1004SDZ Calibration Transmission Line for PCB 

Insertion Loss and Phase Offset Correction 

0

–3.0

0

–50

–40

–30

–20

–10

–2.5

–2.0

–1.5

–1.0

–0.5

0

2.5

5.0

7.5

10.0

12.5

15.0

IN

SER

T

IO

N

L

O

SS

(d

B

)

RE

T

URN

L

O

S

S

(d

B)

FREQUENCY (GHz)

S(2,1)

S(1,1)

17

271

-00

7

 

Figure 8. Calibration Transmission Line Insertion Loss (S(2,1)) and  

Return Loss (S(1,1)) 

Figure 9 shows the calibration transmission line length. All RF 
traces connecting to th

ADGM1004

 are of equal length. 

1

727

1-

0

08

A

B

 

Figure 9. Length of A + B Equal to Length of Calibration Transmission Line 

To de-embed the PCB calibration transmission line insertion 
loss from the entire switch insertion loss board measurement 
(the RF1 to RFC path), divide the S(2,1) of measured data by 
the |S(2,1)| of the calibration transmission line. To perform this 
de-embedding using the network analyzer at the time of the 
measurement or after the measurement, use individual 
measurement data files. Refer to the Network Analyzer 
Calibration Procedure s
ection for more information. 

Use the network analyzer port extension function to de-embed 
the phase offset introduced by the PCB calibration transmission 
lines. The port extension method uses time delay offset values 
for phase correction. To perform this de-embedding, enter the 
time delays into the port extension menu on the network 
analyzer corresponding to the phase offset introduced from an 
RF edge connector to the RFx pin of the 

ADGM1004

. Figure 9 

shows an example of these phase offsets on a typical switch 
measurement, labeled as A and B. Both A and B are identical in 
length, and can be calculated by measuring the time delay of the 
calibration transmission line and dividing it by 2. 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Summary of Contents for EVAL-ADGM1004SDZ

Page 1: ...log Devices Inc MEMS switch technology which provides optimum bandwidth performance power handling capability and linearity for radio frequency applications The control chip generates the high voltage signals necessary for the MEMS switch and allows the user to control operation through a flexible complementary metal oxide semiconductor CMOS low voltage transistor to transistor logic LVTTL complia...

Page 2: ...ard Hardware 4 Power Supply 4 RF Connectors 4 Switch Control Connectors 4 Evaluation Board Software for SPI Interface 6 Installing the Software 6 Initial Setup 6 Block Diagram and Description 7 Memory Map 8 Measuring Switch Performance 9 Network Analyzer Calibration Procedure 11 Handling Guidelines 12 Evaluation Board Schematics and Artwork 13 Ordering Information 18 Bill of Materials 18 REVISION ...

Page 3: ...1004SDZ User Guide UG 1462 Rev 0 Page 3 of 18 EVALUATION BOARD CONNECTION DIAGRAM Figure 1 shows the evaluation board connect diagram 50Ω 50Ω 50Ω RFC RF1 NETWORK ANALYZER POWER SUPPLY 3 3V dc 17271 001 Figure 1 ...

Page 4: ...ternal driver IC voltage boost circuitry Setting the EXTD_EN link to the EXT position disables the internal 10 MHz oscillator and driver boost circuitry Disabling the internal oscillator eliminates the associated 10 MHz noise feedthrough from the switch With the internal oscillator disabled the VCP pin must be driven with 80 V dc from an external voltage supply An external 80 V dc must be applied ...

Page 5: ... Controlled RF Switch RF Switch Status Link Name Link Position RF1 to RFC On P1 D_IN1 IN1 On Off P1 D_IN1 default IN1 Off default RF2 to RFC On P2 D_IN2 IN2 On Off P2 D_IN2 default IN2 Off default RF3 to RFC On P3 D_IN3 IN3 On Off P3 D_IN3 default IN3 Off default RF4 to RFC On P4 D_IN4 IN4 On Off P4 D_IN4 default IN4 Off default ...

Page 6: ... respectively 2 Change the MODE link position from PIN to SPI and keep the EXTD_EN link position set to INT 3 Connect the EVAL ADGM1004SDZ to the SDP B board and connect the SDP B board to the PC via the USB cable 4 Power up the EVAL ADGM1004SDZ as described in the Power Supply section 5 Run the ACE software The EVAL ADGM1004SDZ plugins appear in the Attached Hardware section of the Start tab see ...

Page 7: ...of each block All changes to the blocks correspond to the block diagram in the ACE software For example when the internal register bit is enabled it displays as enabled on the block diagram Any bits or registers that are bolded are modified values that have not been transferred to the EVAL ADGM1004SDZ Click Apply Changes to transfer the data to the EVAL ADGM1004SDZ Table 6 Block Diagram Functions ...

Page 8: ...ory Map tab and can be edited at a bit level see Figure 6 The bits in dark gray are read only bits and cannot be accessed from the ACE software All other bits are toggled The Apply Changes button transfers data to the device All changes made in this tab correspond to the block diagram 17271 005 Figure 6 ADGM1004 Memory Map ...

Page 9: ... 10 2 5 2 0 1 5 1 0 0 5 0 2 5 5 0 7 5 10 0 12 5 15 0 INSERTION LOSS dB RETURN LOSS dB FREQUENCY GHz S 2 1 S 1 1 17271 007 Figure 8 Calibration Transmission Line Insertion Loss S 2 1 and Return Loss S 1 1 Figure 9 shows the calibration transmission line length All RF traces connecting to the ADGM1004 are of equal length 17271 008 A B Figure 9 Length of A B Equal to Length of Calibration Transmissio...

Page 10: ...10 45 35 25 15 5 2 5 2 0 1 5 1 0 0 5 0 2 4 6 8 10 12 14 16 INSERTION LOSS dB RETURN LOSS dB FREQUENCY GHz RF2 TO RFC CHANNEL RF1 TO RFC CHANNEL RF2 TO RFC CHANNEL RF1 TO RFC CHANNEL 17271 009 Figure 10 PCB De Embedded ADGM1004 Insertion Loss and Return Loss Performance Figure 11 shows the ADGM1004 switch off isolation performance measurement results for two channels The blue trace is the RF2 to RF...

Page 11: ...he desired MEMS switch RF connectors and apply the external control signals as needed 6 Measure the complete insertion loss of the EVAL ADGM1004SDZ Include the insertion loss of the MEMS switch and test fixture PCB calibration transmission lines and RF connectors 7 De embed the PCB losses from the complete EVAL ADGM1004SDZ measurement using the data saved from Step 3 and the measured data from Ste...

Page 12: ...AL ADGM1004SDZ from the edges to avoid any damage to the device under test DUT Avoid connecting live signal sources to the EVAL ADGM1004SDZ Ensure that outputs are switched off preferably grounded before connecting to the DUT Ensure that all instrumentation shares a common chassis ground Avoid running measurement instruments such as digital multimeters DMMs in autorange modes Some instruments gene...

Page 13: ...EVAL ADGM1004SDZ User Guide UG 1462 Rev 0 Page 13 of 18 EVALUATION BOARD SCHEMATICS AND ARTWORK 17271 011 Figure 12 EVAL ADGM1004SDZ Schematic ...

Page 14: ...UG 1462 EVAL ADGM1004SDZ User Guide Rev 0 Page 14 of 18 17271 012 Figure 13 EVAL ADGM1004SDZ Schematic with SDP B Board ...

Page 15: ...ADGM1004SDZ User Guide UG 1462 Rev 0 Page 15 of 18 17271 013 Figure 14 EVAL ADGM1004SDZ Component Side PCB Drawing Layer 1 17271 014 Figure 15 EVAL ADGM1004SDZComponent Side Ground Plane PCB Drawing Layer 2 ...

Page 16: ...L ADGM1004SDZ User Guide Rev 0 Page 16 of 18 17271 015 Figure 16 EVAL ADGM1004SDZ Component Side Ground Plane PCB Drawing Layer 3 17271 016 Figure 17 EVAL ADGM1004SDZ Component Side Bottom Side PCB Drawing Layer 4 ...

Page 17: ...PPER WEIGHT 1oz 1 4 THOU 35µM 37 2 THOU FR4 METAL 3 COPPER WEIGHT 1oz 1 4 THOU 35 µm ROGERS RO4003C 8THOU LAMINATE ER 3 38 STARTING COPPER WEIGHT 0 5oz 0 5oz METAL 4 FINISHED COPPER PLATING 1 5oz 2 1 THOU 53µm CPWG RF TRACE WIDTH 15 THOU CPWG RF TRACE TO GROUND GAP 12 2 THOU FINAL OVERALL PCB THICKNESS 62 THOU FINAL COPPER PLATING THICKNESS ON TOP AND BOTTOM LAYERS 1 5oz 17271 019 Figure 19 EVAL A...

Page 18: ... is expressly made subject to the following additional limitations Customer shall not i rent lease display sell transfer assign sublicense or distribute the Evaluation Board and ii permit any Third Party to access the Evaluation Board As used herein the term Third Party includes any entity other than ADI Customer their employees affiliates and in house consultants The Evaluation Board is NOT sold ...

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