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UG-1770 

EVAL-AD7383FMCZ

 Evaluation Board User Guide

 

Rev. A | Page 14 of 16 

Waveform Tab 

The 

Waveform

 tab displays data in the form of time vs. discrete 

data values with the results, as shown in Figure 19. 

CAPTURE Pane 

The 

CAPTURE

 pane contains the capture settings. These settings 

reflect onto the registers automatically before data capture. 

The 

Sample Count

 pulldown menu in the 

General Capture 

Settings

 section allows the user to select the number of samples 

per channel per capture (see Figure 19). 

The 

SPI Frequency

 pulldown menu allows the user to select 

the SPI clock frequency used to transfer data between the 
FPGA device and th

AD7383

 during device register reads and 

writes and during data capture (see Figure 19). This frequency 
must be set relatively higher than the set throughput rate. 

The user can enter the input sample frequency in kSPS in the 

Sampling Frequency(ksps)

 box (see Figure 19). Refer to the 

AD7383 data sheet to determine the maximum sampling 
frequency for the selected mode. 

The 

Over Sampling Ratio

 pulldown menu, when enabled, can 

be set between 2 and 32 and provide improved signal-to-noise 
ratio (SNR) performance (see Figure 19). Refer to the AD7383 
data sheet to determine the maximum oversampling ratio for 
the selected oversampling mode. 

The 

Over Sampling Mode

 pulldown menu allows the user to 

select the mode of oversampling (see Figure 19). This setting is 
only applicable when oversampling is enabled. 

Click 

Run Once 

to start a data capture of the samples at the 

sample rate specified in the 

Sample Count

 pulldown menu (see 

Figure 19). These samples are stored on the FPGA device and 
are only transferred to the PC when the sample frame is complete. 

Click 

Run Continuously

 to start a data capture that gathers 

samples continuously with one batch of data at a time (see 
Figure 19). This operation runs the 

Run Once

 operation 

continuously. 

RESULTS Pane 

The 

Display Channels

 section allows the user to select the 

channels to capture (see Figure 19). The channel data is shown 
only if that channel is selected before the capture. 

The 

Waveform Results

 section displays the amplitude, 

Sample 

Frequency

, and noise analysis data for the selected channels 

(see Figure 19). 

Click 

Export 

to export the captured data (see Figure 19). The 

waveform, histogram, and FFT data is stored in .xml files along 
with the values of parameters at capture. 

The data 

Waveform

 graph shows each successive sample of the 

ADC output (see Figure 19). The user can zoom in on and pan 

over the 

Waveform

 graph using the embedded waveform tools 

above the graph. Select the channels to display in the 

Display 

Channels

 section. 

Under the 

Display Units

 dropdown menu, select 

Codes

 above 

the 

Waveform

 graph (see Figure 19) to select whether the 

Waveform

 graph displays in units of 

Codes

Hex

, or 

Volts

. The 

axis controls are dynamic. 

When either 

y-scale dynamic

 or 

x-scale dynamic

 is selected, 

the corresponding axis width automatically adjusts to show the 
entire range of the ADC results after each batch of samples. 

Histogram Tab 

The 

Histogram

 tab contains the 

Histogram

 graph and the 

RESULTS

 pane, as shown in Figure 20. 

The 

RESULTS

 pane displays the information related to the dc 

performance. 

The 

Histogram

 graph displays the number of hits per code within 

the sampled data (see Figure 20). The 

Histogram

 graph is useful 

for dc analysis and indicates the noise performance of the AD7383. 

FFT Tab 

The 

FFT

 tab displays fast Fourier transform (FFT) information for 

the last batch of samples gathered (see Figure 21)

ANALYSIS Pane 

The 

General Settings

 section allows the user to set up the 

preferred configuration of the FFT analysis, including how many 
tones are analyzed (see Figure 21). The fundamental is set 
manually. 

The 

Windowing

 section allows the user to select the windowing 

type used in the FFT analysis, the number of 

Harmonic Bins

and the number of 

Fundamental Bins

 that must be included 

(see Figure 21). 

The 

Single Tone Analysis

 and 

Two Tone Analysis

 sections 

allow the user to select the fundamental frequency included in 
the FFT analysis (see Figure 21). Use the 

Two Tone Analysis

 

settings when analyzing two frequencies. 

RESULTS Pane 

The 

Signal

 section displays the 

Sample Frequency

Fund 

Frequency

, and 

Fund Power

 (see Figure 21)

The 

Noise

 section displays the 

SNR

 and other noise performance 

results (see Figure 21). 

The 

Distortion

 section displays the harmonic content of the 

sampled signal and dc power when viewing the FFT analysis 
(see Figure 21)

EXITING THE SOFTWARE 

To exit th

ACE

 software, clic

File

 and then click 

Exit

 

Summary of Contents for EVAL-AD7383FMCZ

Page 1: ...FMCZ is a fully featured evaluation board that evaluates all features of the AD7383 analog to digital converter ADC The EVAL AD7383FMCZ is controlled by the EVAL SDP CH1Z SDP H1 system demonstration platform SDP via the 160 way SDP connector J4 The SDP H1 controls the EVAL AD7383FMCZ through the USB port of a PC using the Analysis Control Evaluation ACE software which is available to download from...

Page 2: ...3FMCZ Description 4 Power Supplies 4 Link Configuration Options 5 Evaluation Board Circuitry 6 Sockets and Connectors 6 Test Points 6 Evaluation Board Software 7 Software Installation Procedures 7 Evaluation Board Setup Procedures 9 ACE Software Operation 10 Launching the Software 10 Description of Chip View Window 10 Description of Memory Map View Window 13 Description of Analysis View Window 13 ...

Page 3: ...e EVAL AD7383FMCZ box When installing the ACE software ensure that the SDP H1 is disconnected from the USB port of the PC The PC may need to be restarted after the installation 2 Ensure that the link options are configured as detailed in Table 2 3 Connect the SDP H1 to the EVAL AD7383FMCZ as shown in Figure 2 4 Connect the SDP H1 to the PC via the USB cable If prompted by the operating system choo...

Page 4: ...ference circuit An external 2 5 V power supply can also be used with AD7383 The EVAL AD7383FMCZ has a footprint ready to place an ADR4525 when an external 2 5 V power supply is required for evaluation A pseudo differential signal can be connected on the Subminiature Version B SMB connectors J1 to J4 Table 1 Optional External Power Supplies Power Supply Connector Voltage Range V Description 12 V P4...

Page 5: ...lt Use the 12 V power supply from the SDP H1 3 Use the external 12 V power supply via P4 1 see Table 1 LK4 Reference voltage VREF 1 Use the external VREF source connected via EXTREF see Table 3 3 default Use the internal 3 3 V from U3 ADR4533 for VREF 5 This option is not available The ADR4525 footprint is in place LK5 VLOGIC 3 Use the internal 2 3 V from U6 ADP166 for VLOGIC JP1 AINA 1 SMD resist...

Page 6: ...ls P4 Main board power supply 12 V for all internal voltage regulators P5 ADC power supply and digital SPI power supply P6 Amplifier power supply P7 Field programmable gate array FPGA mezzanine card FMC to low pin count LPC connector EXTREF External voltage reference The default interface to the EVAL AD7383FMCZ is achieved via the 160 way connector The connector attaches the EVAL AD7383FMCZ to the...

Page 7: ... to the PC Installing the ACE Software To install the ACE software take the following steps 1 Download the ACE software to a Windows based PC 2 Double click the ACEInstall exe file to begin the installation By default the software is saved to the following location C Program Files x86 Analog Devices ACE 3 A dialog box opens asking for permission to allow the program to make changes to the PC Click...

Page 8: ...ponents 8 The Windows Security window opens see Figure 8 Click Install Figure 9 shows the installation in progress No action is required 23397 008 Figure 8 Windows Security Window 23397 009 Figure 9 Installation in Progress 9 When the installation is complete click Next see Figure 10 and then click Finish to complete the installation process 23397 010 Figure 10 Installation Complete ...

Page 9: ... USB cable included in the SDP H1 kit Verifying the Board Connection After connecting the power and the USB cable from the SDP H1 to the PC take the following steps to verify the board connection 1 After connecting the SDP H1 to the PC allow the Found New Hardware Wizard to run Choose to automatically search for the drivers for the SDP H1 if prompted by the operating system 2 Navigate to the Devic...

Page 10: ...D7383 Eval Board view window shown in Figure 13 4 Double click the AD7383 chip icon in the AD7383 Eval Board view window to open the AD7383 chip view window shown in Figure 14 5 Click Software Defaults and then click Apply Changes to apply the default settings to the AD7383 see Figure 14 DESCRIPTION OF CHIP VIEW WINDOW After completing the steps in the Software Installation Procedures section and ...

Page 11: ...EVAL AD7383FMCZ Evaluation Board User Guide UG 1770 Rev A Page 11 of 16 23397 013 Figure 13 AD7383 Eval Board View Window 23397 014 Figure 14 AD7383 Chip View Window ...

Page 12: ...UG 1770 EVAL AD7383FMCZ Evaluation Board User Guide Rev A Page 12 of 16 23397 015 Figure 15 Over Sampling Configurable Pop Up Window 23397 021 Figure 16 Reference Voltage Configurable Pop Up Window ...

Page 13: ... Selected to write the new value on the selected register to the AD7383 Click Read All to read the values of all the registers from the chip Click Read Selected to read the selected register from the chip Click Reset Chip to prompt the software to reset the AD7383 Click Diff to check for differences in register values between the software and the chip To revert all the register values back to thei...

Page 14: ...he selected channels see Figure 19 Click Export to export the captured data see Figure 19 The waveform histogram and FFT data is stored in xml files along with the values of parameters at capture The data Waveform graph shows each successive sample of the ADC output see Figure 19 The user can zoom in on and pan over the Waveform graph using the embedded waveform tools above the graph Select the ch...

Page 15: ...EVAL AD7383FMCZ Evaluation Board User Guide UG 1770 Rev A Page 15 of 16 23397 018 Figure 19 Waveform Tab 23397 019 Figure 20 Histogram Tab ...

Page 16: ...any other party for any reason Upon discontinuation of use of the Evaluation Board or termination of this Agreement Customer agrees to promptly return the Evaluation Board to ADI ADDITIONAL RESTRICTIONS Customer may not disassemble decompile or reverse engineer chips on the Evaluation Board Customer shall inform ADI of any occurred damages or any modifications or alterations it makes to the Evalua...

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