Analog Devices EVAL-AD5680DBZ, User Manual

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EVAL-AD5680DBZ User Guide UG-989
Rev. 0 | Page 7 of 12
+2.5V +4.096V
C16
1µF
C15
1µF
6
OUTPUT
2
VIN
3
SLEEP
4
GND
U6
REF198
C17
1µF
+5V
+2.5V +4.096V
EX_REF_1 EX_REF_2 EX_REF_3 EX_REF_4
VREF_1 VREF_2 VREF_3
VREF_4
2
+VIN
5
TRIM
6
VOUT
4
GND
U4
ADR445ARMZ
2
+VIN
4
GND
5
TRIM
7
COMP
6
VOUT
U5
ADR431BRZ
D
C
A
B
E
REF3
D
C
A
B
E
REF4
D
C
A
B
E
REF1
D
C
A
B
E
REF2
+5VREF +2_5VREF +4_096VREF VDD VDD
+5VREF
+2_5VREF
+4_096VREF
VREF1
+5VREF
+2_5VREF
+4_096VREF
VREF2
+5VREF
+2_5VREF
+4_096VREF
VREF3
+5VREF
+2_5VREF
+4_096VREF
VREF4
VDD VDD VDD VDD
VDD
14528-
008
Figure 6. EVAL-MBnanoDAC-SDZ Motherboard Reference Voltage Selector Circuit
DAUGHTER BOARD CONNECTOR
SPI PMOD CONNNECTOR GPIO PMOD CONNNECTOR
I2C PMOD CONNNECTOR
1
3
5
7
9
2
4
6
8
10
J2
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
J1
SDIN SDO SCLK SYNC SCL LDAC CLR PD GAIN SDA
1 2
3 4
5 6
7 8
J9
J8-1
J8-2
J8-3
J8-4
J8-5
J8-6 J7-1
J7-2
J7-3
J7-4
J7-5
J7-6
J3-
1
J3-
2
J3-
3
J3-
4
J3-
5
J3-
6
J4-1
J4-2
J4-3
J4-4
J4-5
J4-6
J4-7
J4-8
V
D
D
V
R
E
F
1
V
R
E
F
2
V
R
E
F
3
V
R
E
F
4
V
L
OGIC
SDA SCL
SYNC
SCLK
SDO
SDIN
LDAC
CLR
PD
GAIN
DB6
DB7
DB8
DB9
DB0
DB1
DB2
DB3
VOUT_0
VOUT_1
VOUT_2
VOUT_3
VOUT_4
VOUT_5
VOUT_6
VOUT_7
SCL
SDA
DGND
VLOGIC
SCL
SDA
DGND
VLOGIC
SYNC
SDO
SDIN
SCLK
DGND
VLOGIC
PD
GAIN
DGND
LDAC
CLR
VLOGIC
DGND
CS
WR
DB11
DB5
DB10
DB4
AGND
14528-
009
Figure 7. EVAL-MBnanoDAC-SDZ Motherboard Connectors to Daughter Board and Serial Interface
VOUT_0
VOUT_1
VOUT_2
VOUT_3
VOUT_4
VOUT_5
VOUT_6
VOUT_7
+
-
3
2
1
U10-A
AD8608ARUZ
+
–
5
6
7
U10-B
AD8608ARUZ
+
–
10
9
8
U10-C
AD8608ARUZ
+
–
12
13
14
U10-D
AD8608ARUZ
3
+
2
–
1
U7-A
AD8616ARZ
5
+
6
–
7
U7-B
AD8616ARZ
8
V+
4
V–
U7-C
AD8616ARZ
2
–
3
+
6
OP
4
V–
7
V+
U11
AD8655
2
–
3
+
6
OP
4
V–
7
V+
U12
AD8655
VOUT_0
VOUT_1
VOUT_2
VOUT_3
VOUT_4
VOUT_5
VOUT_6
VOUT_7
VDD
VSS
VDD
VDD
VSS
VSS
14528-
010
Figure 8. EVAL-MBnanoDAC-SDZ Motherboard Output Amplifier Circuit