ADV8005 Hardware Reference Manual
UG-707
subpkt3_r_src[2:0]
, TX2 Main Map,
Address 0xF411[2:0]
This signal is used to specify the source of sub packet 3, right channel.
Function
subpkt3_r_src[2:0]
Description
000
I2S[0], left channel
001
I2S[0], right channel
010
I2S[1], left channel
011
I2S[1], right channel
100
I2S[2], left channel
101
I2S[2], right channel
110
I2S[3], left channel
111 (default)
I2S[3], right channel
i2s_32bit_mode
, TX2 Main Map,
Address 0xF442[3] (Read Only)
This bit is used to readback the I2S mode detection. It shows the number of SCLK periods per LRCLK period.
Function
i2s_32bit_mode
Description
0 (default)
I2S 32 bit mode detected
1
I2S 64 bit mode detected
cs_bit_override
, TX2 Main Map,
Address 0xF40C[6]
This bit is used to select the source of channel status bits when using I2S Mode 4.
Function
cs_bit_override
Description
0 (default)
Use channel status bits from I2S stream
1
Use channel status bits programmed in I2C registers
audio_sampling_freq_sel
, TX2 Main Map,
Address 0xF40C[7]
This bit is used to select whether the audio sampling frequency is set automatically or manually (via I2C).
Function
audio_sampling_freq_sel
Description
0
Use sampling frequency from I2S stream, for SPDIF stream
1 (default)
Use sampling frequency from I2C registers
Figure 98: IEC60958 Sub Stream
Data
V
U
C
B
L
S
B
23
24
27
Validity Flag
User Data
Channel Status
Block Start Flag
M
S
B
0
0
0
0
31
0
31
Figure 99: AES3 Stream Format Input to ADV8005
Rev. A | Page 219 of 317
