ADuCM310 Hardware Reference Manual
UG-549
Rev. C | Page 99 of 192
DIGITAL INPUTS/OUTPUTS OPERATION
Input/Output Pull-Up Enable
All GPIO pins have an internal pull-up resistor with a drive capability of 3 mA. Using the GPxPUL register, it is possible to enable/disable
pull-up registers on the pins when they are configured as inputs. The pull-ups are automatically disabled when the GPIO pin is set as an
output or when open circuit is enabled. The pull-ups are also disabled by default.
The pull-up is implemented as a MOS device; therefore, the pull-up resistor value varies with the voltage on the pin.
If a pin is configured as an open-drain output, it is not possible to enable the internal pull-up; an external pull-up is required. This only
affects open-drain output mode, not input mode.
10
20
30
40
50
R
OUT
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
VOLTAGE AT PIN (V)
0
20
40
60
80
I
PULL-UP
1
1461-
017
X
L
C 3
X
L
C –6
Figure 19. GPIO Pull-Up Resistor Value
Input/Output Data In
When configured as an input (by default), the GPIO input levels are available in the GPxIN register.
Open-Drain Enable
This disables the input paths if the pin is set as an output. To disable the input and not drive the pin, set the open drain and drive Logic 1.
External interrupts are not available when open drain is enabled.
If a pin is configured as an open-drain output, it is not possible to enable the internal pull-up; an external pull-up is required. This only
affects open-drain output mode, not input mode.
To enable a pin as an open-drain output, set the appropriate bit in the GPxOEN and GPxODE registers.
Input/Output Data Out
When the GPIOs are configured as outputs, the values in the GPxOUT register are reflected on the GPIOs.
Bit Set
Bit set mode sets one or more GPIO data outputs without affecting others within a port. Only the GPIO corresponding with the write
data bit equal to 1 is set; the remaining GPIOs are unaffected.
Bit Clear
Bit clear mode clears one or more GPIO data outputs without affecting others within a port. Only the GPIO corresponding with the write
data bit equal to 1 is cleared; the remaining GPIOs are unaffected.
Bit Toggle
Bit toggle mode toggles one or more GPIO data outputs without affecting others within a port. Only the GPIO corresponding to the write
data bit equal to 1 is toggled; the remaining GPIOs are unaffected.
Input/Output Data Output Enable
The data output path is enabled; the values in the GPxOUT register are reflected on the GPIOs.
