Analog Devices ADSP-CM411F, Manual

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18. 17000063 - System Watchpoint Units 3 and 4 Incorrectly Alias Master IDs:
DESCRIPTION:
SWU3 and SWU4 only monitor the 6 LSBs of the SWU ID instead of 9 bits. As a result, the Master ID of the masters that share the same 6
LSBs, but have different MSBs, are incorrectly aliased. The SWUs cannot exactly track the master write to the FFT (monitored by SWU3) or
SMC (monitored by SWU4).
Table 1 shows the SWU IDs with respect to various masters. The bits highlighted in the table are not monitored by the SWU. An "X" in the
table indicates "don't care".
Table 1: SWU3 and SWU4 Master IDs
ID Bits [8:0] Masters
00000X000 DMA4 (UART1_TX)
00000X001 DMA5 (UART1_RX)
00000X010 DMA6 (SPI1_TX/UART2_TX)
00000X011 DMA7 (SPI1_RX/UART2_RX)
00000X100 DMA8 (HAE_IN0/UART3_TX)
00000X101 DMA9 (HAE_OUT/UART3_RX)
00000X110 DMA10 (HAE_IN1/UART4_TX/SPORT0A)
00000X111 DMA11 (SPORT0B/UART4_RX)
01000X000 DMA12 (MDMA0_RD)
01000X001 DMA13 (MDMA0_WR)
10000X000 SINC
10000X001 ADCC0/DACC0
10000X010 FFT
11000X011 CONT_MST
11000X100 SUPER_MST
Table 2 shows the masters with ID bits [5:0] in common that are affected by this anomaly.
Table 2: SWU3 and SWU4 Aliased Master IDs
ID Bits [5:0] Aliased Masters
00X000 DMA4 (UART1_TX), DMA12 (MDMA0_RD), SINC
00X001 DMA5 (UART1_RX), DMA13 (MDMA0_WR), ADCC0/DACC0
00X010 DMA6 (SPI1_TX/UART2_TX), FFT
00X011 DMA7 (SPI1_RX/UART2_RX), CONT_MST (M4 Controller)
00X100 DMA8 (HAE_IN0/UART3_TX), SUPER_MST (M0 Master (DMA0: SPI0_TX, DMA1: SPI0_RX))
WORKAROUND:
None.
APPLIES TO REVISION(S):
0.0
ADSP-CM411F/412F/413F/416F/417F/418F/419F
NR004483C | Page 8 of 12 | July 2017
Silicon Anomaly List