
JTAG Interface
1-22
ADSP-BF518F EZ-Board Evaluation System Manual
JTAG Interface
The JTAG connector (
P1
) allows the standalone debug agent to connect a
debug session to the ADSP-BF518F processor. The debug agent operates
only when the external 5V wall adaptor is used (
J3
). When operating the
EZ-Board from a battery or USB bus power, the debug agent is not
powered.
The standalone debug agent can be removed, and an external emulator
can be attached to the EZ-Board. Be careful not to damage the connectors
when removing the debug agent. The emulator connects to
P1
on the back
side of the board. See
“EZ-Board Installation” on page 1-4
for more
information.
For more information about emulators, contact Analog Devices or go to:
http://www.analog.com/processors/blackfin/evaluationDevelop-
.
Land Grid Array
The ADSP-BF518F EZ-Board has provisions for probing every port pin
and the EBIU interface of the processor on connectors
P5—7
. The connec-
tor locations are intended for use with a Tektronix DMAX logic analyzer
connector, but can be probed with any oscilloscope or logic analyzer. For
pinout information, refer to
“ADSP-BF518F EZ-Board Schematic” on
For more information on the Tektronix DMAX logic analyzer interface,
go to the Tektronix Web site.