
ADSP-BF518F EZ-Board Evaluation System Manual
1-17
Using ADSP-BF518F EZ-Board
The PHY portion of the Ethernet chip connects to a Pulse HX1188 mag-
netics, then to standard RJ-45 Ethernet connectors (
J14
and
J15
).
more information, see “Ethernet Connectors (J14–15)” on page 2-27.
Example programs are included in the EZ-Board installation directory to
demonstrate how to use the Ethernet interface.
Audio Interface
The audio interface of the EZ-Board consists of a low-power stereo codec,
SSM2602, with an integrated headphone driver and associated passive
components. There are two inputs, a stereo line in, and a mono micro-
phone, as well as two outputs, a headphone, and a stereo line out. The
codec has integrated stereo ADCs, digital-to-analog converters (DACs),
and requires minimal external circuitry.
The codec connects to the ADSP-BF518F processor via the processor’s
serial port 0. The
SPORT0
is disconnected from the codec by turning switch
SW15
OFF
, which enables
SPORT0
for the SD/eMMC interface or the expan-
sion interface II. See
“SPORT0 ENBL Switch (SW15)” on page 2-13
for
more information.
The control interface of the codec is selected by switching
SW16
between
the 2-wire interface (TWI) and SPI. The board’s default is SPI mode.
Refer to
“SPI/TWI Switch (SW16)” on page 2-13
for more information.
Mic gain values of 14 dB, 0 dB, or –6 dB are selectable through switch
SW5
.
For more information, see “MIC Gain Switch (SW5)” on page 2-10.
Microphone bias is provided through a low-noise reference voltage. A
jumper on positions 2&3 of
JP15
connects the
MICBIAS
signal to the audio
jack. Placing a jumper on positions 1&2 of
JP15
connects the bias directly