When the Rx buffer is full, an interrupt is generated that checks the Rx request variable. If
the variable > 0 then the contents of the Rx buffer are written into the User Rx Buffer, and
the Rx request is cleared. Afterwards, the DMA is re-initialized to fill the Rx buffer again.
3.3 Running Your Own Programs
This section provides the user with the basic information that is needed to run their own programs
on the ADSP-21065L EZ-KIT Lite. Build these programs using the SHARC tools. This
information includes rules for using processor memory, a description AD1819 control registers
(with respect to DSP programming), and a simple program generation procedure.
Although there are many ways to go about developing programs in the Vi+ envi-
ronment, all program evaluation within the environment should include the following steps:
•
Step1: Create a New Project File
•
Step 2: Set Target Processor Project Options
•
Step 3: Add and Edit Project Source Files
•
Step 4: Customize Project Build Options
•
Step 5: Build a Debug Version of the Project
•
Step 6: Debug the Project
•
Step 7: Build a Release Version of the Project
By following these steps, DSP projects build consistently and accurately with minimal project
management. The
ADSP-21065L SHARC Technical Reference
and
ADSP-21065L SHARC User’s
Manual
provides detailed information on programming the processor and the Vi+
manuals provide information on code evaluation with the SHARC tools.
•
Do not run more than one ADSP-21065L EZ-KIT Lite Session in the debugger at any one
time. You may run an EZ-KIT Lite session and a simulator or ICE session at the same time
or you can open two debugger interfaces to run more than one EZ-KIT Lite session.
•
Before making changes to the source code in the IDE, the user needs to clear all breakpoints
and close the source window. Then make the changes, rebuild the program and reload it
into the debugger.
3.3.1 ADSP-21065L Memory Map
The ADSP-21065L EZ-KIT Lite board contains 1M x 32 of external SDRAM. This
memory is connected to MS3 (Memory Select). The ADSP-21065L has 544 Kbits of
internal SRAM that can be used for either program or data storage. The configuration of
on-chip SRAM is detailed in the
ADSP-21065L SHARC User’s Manual
. Table 3-5 shows
the memory map of the ADSP-21065L EZ-KIT Lite.
The IMDW0 bit in the SYSCON register must be set to 1 to keep communication with the
host. This bit determines if data accesses made to internal memory block 0 are 40-bit three
column accesses (set = 1) or 32-bit two column accesses (cleared = 0). The monitor
program requires three column data accesses to memory block 0.
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