UG-1698
Rev. 0 | Page 6 of 23
HARDWARE SETUP
CONFIGURATION 1: EXTERNAL CLOCK
To use the external signal generator as the clock source, follow
these steps:
1.
Connect a low phase noise, high frequency clock source to
the J4 connector.
2.
Set the output level to 0 dBm. Higher clock power results
in improved phase noise. Refer to the
data sheet.
3.
Connect a second low phase noise, high frequency clock
source (10 MHz to 250 MHz) with a 0 dBm output level as
the reference clock to the
to the J61 SMA
connector.
4.
To supply the bit rate/40 clock from an external source,
connect the high frequency clock source to J1, and ensure
the resistor jumpers are properly configured (R172, R107,
R94, and R173).
5.
Ensure the two clock sources are frequency locked to a
common reference. A unit (such as the Rohde & Schwarz
SMA100B) provides an option for a secondary signal
source, where both outputs are derived from a common
reference. Alternatively, the 10 MHz reference output of the
signal generator can be directly connected to the reference
input at J61.
6.
Connect the spectrum analyzer to the J32 SMA connector.
7.
Connect the AD9166-FMC-EBZ evaluation board to the
FMC connector of the
. Ensure the FMC
pins are properly aligned before connecting the evaluation
board.
8.
Connect the power switch on the
to apply
power to both boards.
CONFIGURATION 2: ON-BOARD CLOCK
ICs as the clock
sources, follow these steps:
1.
Connect the spectrum analyzer to the J32 SMA connector.
2.
Connect the AD9166-FMC-EBZ evaluation board to the
FMC connector of the
. Ensure the pins are
properly aligned before connecting the board.
3.
Connect the ac adapter to the
4.
Press the power switch on the
to apply
power to both boards.
CONFIGURATION 3: NCO ONLY
can operate in NCO only mode, which does not
require a JESD204B link to supply data samples from an FPGA.
The
operates as a direct digital synthesizer (DDS).
However, the SPI bus to control the AD9166-FMC-EBZ is
routed through the FMC connector, and either an
or an FPGA development kit must be connected to the
evaluation board to send SPI commands.
As a workaround, short wires can be soldered to test points
located near U6 (a SPI bus level shifter) and connected to a
microcontroller or another device capable of sending SPI
commands. In this case, do not connect the evaluation board to
the FMC connector to avoid sending unintentional SPI
commands to the
. The evaluation board can be
powered from an external 12 V supply connected across 12VIN
and GND1 test points.
can operate as a DDS, configure
the evaluation board while it is connected to a data pattern
generator such as the
. After the evaluation board
is configured, apply an additional 12 V supply across the two
test points, 12VIN and GND1, and then power down the
. At this point, the evaluation board can be
carefully disconnected from the FMC connector while the
board is still powered on. This approach demonstrates that the
can operate as a DDS without an active JESD204B link
or a connection to an FPGA development kit.
Follow these steps:
1.
Connect the spectrum analyzer to the J32 SMA connector.
2.
If using an external clock source, connect a low phase
noise, high frequency clock source to J4.
3.
Connect the AD9166-FMC-EBZ evaluation board to the
FMC connector of the
. Ensure the FMC
pins are properly aligned before connecting the board.
4.
Press the power switch on the
to apply
power to both boards
5.
Configure the evaluation board using the
software.
6.
With power from the
applied and the
evaluation board configured in NCO only mode, carefully
connect an additional 12 V dc supply across 12VIN (red)
and GND1. The external power supply must have capacity
for 1.25 A of current.
7.
Turn on power for the external 12 V supply. The current
draw from the
drops, and the current draw
from the external power supply increases.
8.
Disconnect the evaluation board from the
Before reconnecting the evaluation board to the
first power down both the 12 V supply and the
Consider using an FMC adapter to avoid wearing out the FMC
connector.
