background image

AD9166-FMC-EBZ

 User Guide 

UG-1698

 

Rev. 0 | Page 19 of 23 

TROUBLESHOOTING 

Debugging the Evaluation Board Using On-Board LEDs 

There are six LEDs on the AD9166-FMC-EBZ evaluation board: 
DS1, DS2, DS3, DS4, DS5, and DS8.  

 

12 V power LED: DS2 = on indicates that 12 V was applied 
to the evaluation board. 

 

LTC2928

 power sequencer LEDs: DS8 = on and DS1 = off 

indicate that th

AD9166

 supplies have sequenced correctly 

and the monitored supplies are within the specified voltage 
range, according to the limits programmed in the 

LTC2928

DS1 = on indicates a power sequencing fault. For 

debugging, the response of th

LTC2928

 to a fault 

condition can be overridden by shorting the 2-pin header, 
P2. Shorting P2 signals to the 

LTC2928

 to maintain power 

to the 

AD9166

 despite a sequencing fault, which in turn 

may damage th

AD9166

.   

 

HMC7044

 fault LED: DS4 = on indicates an issue with the 

HMC7044

. When either PLL1 or PLL2 is used, an on state 

indicates that one of the PLLs did not lock. When PLL1 
and PLL2 are not used, an on state indicates an issue with 
the output dividers. This LED is connected to a general-
purpose input/output (GPIO) pin, and its function can be 
programmed by writing to the appropriat

HMC7044

 SP

register.  

 

ADF4372

 fault LED: DS5 = on indicates th

ADF4372

 PLL 

locked correctly. This LED turns on only if the 

ADF4372

 is 

used to generate a clock. This LED stays off by default. This 
LED is connected to the MUXOUT pin of th

ADF4372

and its function can be programmed by writing to the 
appropriat

ADF4372

 SPI register.   

 

AD9166

 interrupt request (IRQ) LED: DS3 is connected to 

the IRQ pin of th

AD9166

. DS3 = on may indicate an 

unreliable JESD204B link, or another fault as reported by 
th

AD9166

. The specific error can be read from the 

AD9166

 registers. See th

AD9166

 data sheet for details. In 

a tested platform such as the AD9166-FMC-EBZ evaluation 
board, the majority of JESD204B link issues are due to 
improperly configured external clocking. Make sure all 
clocks are properly configured and are set to the correct 
frequencies.  

When the AD9166-FMC-EBZ evaluation board is properly 
configured, the LEDs illuminate as follows:  

 

DS2 = on 

 

DS8 = on and DS1 = off 

 

DS4 = off 

 

DS5 = on (if th

ADF4372

 is used) 

 

DS3 = off 

 

 

DPGDownloader Does Not Recognize the Evaluation 
Board  

The AD9166-FMC-EBZ evaluation board can be run with or 
without an 

ADS7-V2EBZ

, as long as it is connected across the 

FMC connector to a carrier board that supports the VITA 57.x 
standard.  

When using the 

ADS7-V2EBZ

, connect the evaluation board to 

its FMC connector. With a USB cable connecting th

ADS7-

V2EBZ

 to a PC, open the 

DPGDownloader 

software. When the 

DPGDownloader

 software recognizes th

ADS7-V2EBZ

, i

attempts to read the evaluation board ID of the AD9166-FMC-
EBZ through the FMC connector and across an I

2

C bus. With a 

board recognized, the 

DPGDownloader

 uploads the image 

onto an FPGA on board the 

ADS7-V2EBZ

. The image must 

correspond to the evaluation board that is connected to the 

ADS7-V2EBZ

. With the image loaded, the ADS7 then applies 

power to the AD9166-FMC-EBZ evaluation board.  

If the 

DPGDownloader

 software does not recognize the evalua-

tion board, it does not load an FPGA image and does not apply 
power to the evaluation board. If no FPGA image is loaded and 
no power is applied to the evaluation board, confirm all hardware 
is properly connected. Close the 

DPGDownloader

 software, 

power down the 

ADS7-V2EBZ

, unplug the USB cable, and 

gently unplug the evaluation board from the FMC connector. 
Inspect the FMC connector for bent pins or other damage. 
Then reconnect the hardware and reopen 

DPGDownloader

.  

If 

DPGDownloader

 still does not recognize the AD9166-FMC-

EBZ evaluation board, make sure that it is the latest version availa-
ble at 

wiki.analog.com/resources/eval/dpg/dacsoftwaresuite

.. 

It is possible that the firmware on th

ADS7-V2EBZ

 is outdated. 

The firmware can be updated from 

DPGDownloader

 if 

necessary. Refer to th

ADS7-V2EBZ

 Firmware Update Needed 

section for more details. 

DPGDownloader Does Not Recognize an 

ADS7-V2EBZ

 

To confirm that the 

DPGDownloader

 software recognizes a 

particula

ADS7-V2EBZ

 board, connect the board to a PC using a 

USB cable. If the evaluation board is not connected to the FMC 
port of the 

ADS7-V2EBZ

, the 

DPGDownloader

 software 

automatically loads a generic FPGA image onto th

ADS7-

V2EBZ

. However, if the AD9166-FMC-EBZ evaluation board is 

connected to the FMC port, the DPG Downloader attempts to 
recognize the evaluation board and loads an FPGA image onto the 

ADS7-V2EBZ

 that is compatible with the AD9166-FMC-EBZ 

evaluation board. 

JESD204B Link Does Not Come Up 

The start-up sequences for the JESD204B link, as referenced in 
this user guide, are tested on the AD9166-FMC-EBZ evaluation 
board and are known to work. If the JESD204B link does not 
synchronize correctly (does not come up), an issue with the 
clocking configuration or settings is likely.  

 

Summary of Contents for AD9166-FMC-EBZ

Page 1: ...link which simplifies evaluation of the device The evaluation board is powered by the field programmable gate array FPGA mezzanine card FMC power supply provided through the ADS7 V2EBZ Figure 1 shows...

Page 2: ...l Clock 6 Configuration 2 On Board Clock 6 Configuration 3 NCO Only 6 Getting Started 7 Initial Setup 7 DC Test NCO Mode 8 Configure the Spectrum Analyzer 8 Configure the Evaluation Board 8 Using the...

Page 3: ...p bandwidth of PLL1 results in a longer lock time if the input reference frequency is considerably lower than the oscillator frequency to which the PLL attempts to lock On the AD9166 FMC EBZ evaluatio...

Page 4: ...EBZ cannot be configured to generate an external SYSREF signal to the FMC connector External DAC clock connected to J4 with a low frequency external reference connected to J61 The reference is then ro...

Page 5: ...ter map of the AD9166 and has additional functionality such as the ability to record load and save macros or register sequences to ease programming of the device Use the DPGDownloader program for load...

Page 6: ...66 FMC EBZ is routed through the FMC connector and either an ADS7 V2EBZ or an FPGA development kit must be connected to the evaluation board to send SPI commands As a workaround short wires can be sol...

Page 7: ...Guide section Download this software online from the ACE software page The ACE software package includes the required plugins for the AD9166 FMC EBZ evaluation board INITIAL SETUP Complete the followi...

Page 8: ...e 5 3 Open the evaluation board view by double clicking the AD9166 FMC EBZ evaluation board icon as shown in Figure 5 4 In the AD9166 STARTUP WIZARD under Board Clocking Schemes select All internal cl...

Page 9: ...AD9166 FMC EBZ User Guide UG 1698 Rev 0 Page 9 of 23 22324 006 Figure 6 ACE Initial Configuration 22324 007 Figure 7 AD9166 Chip View and Clock Source Selection in ACE...

Page 10: ...UG 1698 AD9166 FMC EBZ User Guide Rev 0 Page 10 of 23 22324 008 Figure 8 Spectrum Analyzer Plot of DAC Output in NCO Mode Showing a Single Tone at 1 GHz...

Page 11: ...omplete the following steps to configure the ADS7 V2EBZ board and load a single tone at 800 MHz to the on board FPGA 1 To load and play the pattern to the ADS7 V2EBZ open DPGDownloader from Start Prog...

Page 12: ...oder Sending 16 bit data this way can improve spurious performance compared to sending 11 bit data 8 Enter 800 MHz in Desired Frequency 9 Keep 0 0 dB in Amplitude 10 Clear the Unsigned Data box becaus...

Page 13: ...5 3 Using the AD9166 STARTUP WIZARD on the left side of the window follow these steps as shown in Figure 12 a Select SERDES Mode in the Operation Mode dropdown list b Select ADF4372 from the DAC Cloc...

Page 14: ...eld to the desired shift frequency in Hz 7 Change the DC Back Off dB box to 0 dB This step causes the fundamental tone at 800 MHz to shift by the amount determined in the Frequency Shift field 8 Click...

Page 15: ...interpolation is equal to 1 the DPGDownloader software displays a single tone in the Vector dropdown box as shown in Figure 15 The data type is real only not complex and Interpolation Mode is set to...

Page 16: ...k Source dropdown box see Figure 4 To simplify configuration and avoid entering commands manually into the register map one at a time an ACE macro can be used to play a sequence ACE macros can play a...

Page 17: ...ol them and set bits whereas in the Registers view the control is by bit or hexadecimal word Both views can program the registers and are based on user preference Because the AD9166 has a large regist...

Page 18: ...Lane 5 on the AD9166 Lane 5 of the Xilinx JESD204B IP Physical Lane 5 on the FMC connector DP5_C2M is Lane 7 on the AD9166 Lane 7 of the Xilinx JESD204B IP Physical Lane 6 on the FMC connector DP6_C2...

Page 19: ...as it is connected across the FMC connector to a carrier board that supports the VITA 57 x standard When using the ADS7 V2EBZ connect the evaluation board to its FMC connector With a USB cable connect...

Page 20: ...n board provides SYSREF only when it is configured for Subclass 1 with SYSREF generated by the HMC7044 SYSREF cannot be provided to the ADS7 V2EBZ externally through an SMA connector on the evaluation...

Page 21: ...AD9166 FMC EBZ User Guide UG 1698 Rev 0 Page 21 of 23 22324 022 Figure 22 Register Write Error Indicating ACE Does Not Recognize the Evaluation Board...

Page 22: ...good practice to use the latest version of DPGDownloader and upload the latest firmware version to the ADS7 V2EBZ To manually update the ADS7 V2EBZ firmware open the DPGDownloader application and clic...

Page 23: ...r party for any reason Upon discontinuation of use of the Evaluation Board or termination of this Agreement Customer agrees to promptly return the Evaluation Board to ADI ADDITIONAL RESTRICTIONS Custo...

Reviews: