AS7030B/AS7038GB/AS7038RB
AS7030B/AS7038GB/AS7038RB Overview
Eval Kit Manual
• PUBLIC
UG001014
• v1-00 • 2021-May-06
53
│ 20
Equation 1:
𝑆𝐸𝑄_𝑃𝐸𝑅 ∗ (𝑆𝐸𝑄_𝐷𝐼𝑉 + 1) ∗ 1𝜇𝑠
SEQ_DIV holds the value of the 1 µs input clock divider.
Within one sequencer cycle, the sequencer will:
●
Switch on the LEDs at the specified LED start time and then switch them off at the LED stop
time.
●
Start the positive and negative synchronous modulator multiplications at the specified start and
stop times for each operation
●
Trigger a conversion of the currently selected ADC channel at the time specified by the ADC
start time. After the conversion has finished, ADC channel selection will advance the next
enabled ADC channel, which is measured during the next cycle that gives one ADC channel per
sequencer cycle. For the TIA channel, two additional ADC timings can be specified. That means
TIA can be measured up to 3 times within the same sequencer cycle:
●
A 2
nd
measurement will be done, if the value for “2
nd
TIA” is specified (> 0) and is greater
than the one given
in “1
st
” plus the time needed for the ADC to finish one conversion.
●
A 3
rd
measurement will be done, if “3
rd
TIA” value is specified (> 0) and is greater than the
one
given in “2
nd
TIA” plus the time needed for the ADC to finish one conversion.
●
In the case of more than one TIA measurement within the same sequencer cycle, it is
important to make sure that the additional measurements can finish within the time of one
sequencer cycle.
