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About this Document

PCI Express Extender

Hardware Manual

July 23, 2008

Revision 1.4

PCI Express Extender, Hardware Manual, Revision 1.4

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Summary of Contents for PCI Express Extender

Page 1: ...About this Document PCI Express Extender Hardware Manual July 23 2008 Revision 1 4 PCI Express Extender Hardware Manual Revision 1 4 Page 1...

Page 2: ...ftware 7 3 5 Power Limits 8 4 Hardware Description 9 4 1 Board Layout 9 4 2 LEDs 10 4 3 Switch 10 4 4 Jumpers 11 4 5 Connectors 11 5 Installation 13 5 1 Hardware Installation 13 5 2 Software Installat...

Page 3: ...le 3 Switches 10 Table 4 Switch SW2 11 Table 5 Jumpers 11 Table 6 Connectors 12 Table 7 JTAG Programming Interface for XILINX 15 Table 8 JTAG Programming Interface for ALTERA 15 Table 9 JTAG Programmi...

Page 4: ...complete at time of release Please contact AMFELTEC if you find any errors inconsistence or have trouble understanding any part of this document To provide your feedback please send an email to suppo...

Page 5: ...UUT and host system from damage by monitoring and limiting the voltage and current The extender includes logic based on the Xilinx CPLD XC9536XL 10 for debugging and verification purposes FPGA ByteBl...

Page 6: ...General Description Figure 1 PCI Express Extender PCI Express Extender Hardware Manual Revision 1 4 Page 6...

Page 7: ...mmable equalization amplification and de emphasis via on board resistor Supports live insertion for plug in card 3 2 Logic Supports ByteBlaster functionality for different FPGAs Xilinx Altera Lattice...

Page 8: ...Threshold for under voltage monitoring Maximum current for Over voltage protection Comments 3 3V 2 78V min 3 0 A 3 3V Auxiliar y 2 78 V min 470 mA 12V 10 5V min 5 5 A Table 1 Power Limits PCI Express...

Page 9: ...Description 4 1 Board Layout J1 J3 J4 J12 P C I E x p r e s s x 1 L i n k S W 2 SW1 J2 JP7 JP6 JP5 JP4 JP3 JP2 D1 D2 D3 D4 SW1 OFF SW1 ONJ6 JP9 JP8 JP1 Figure 2 Board Layout PCI Express Extender Hard...

Page 10: ...from the Primary PCI bus are disconnected from the UUT Hot swapping MODE SW2 Toggle x 4 Four toggle switches define extender logic between Parallel interface and UUT download interface Table 3 Switche...

Page 11: ...3V power JP2 JP3 JP4 JP5 JP6 Block of Jumpers 5x3 Define power source for the UUT bus If 1 2 pins on the all jumpers are close then extender logic and UUT will be powered from Primary PCI express bus...

Page 12: ...Hardware Description J5 1x PCI express male connector Primary PCI express connector for plug in extender to the motherboard Table 6 Connectors PCI Express Extender Hardware Manual Revision 1 4 Page 12...

Page 13: ...xternal power supply In order to select the power source refer to Table 4 Install the extender into a PCI express slot Extender can be installed in any PCI express connector 1x 4x 8x 16x links Importa...

Page 14: ...nfiguration into a file refer to Software Manual for more details 2 Unload all device drivers associated with the UUT 3 Set the switch SW1 to OFF disable power 4 Now you can remove UUT device from the...

Page 15: ...2 10 2 Table 7 JTAG Programming Interface for XILINX Function Extender 2x5 connector J4 2x5 Altera connector VCC 5v 1 2V 4 4 TDO 3 3 TDI 9 9 TMS 5 5 TCK 1 1 GND 2 10 2 10 Table 8 JTAG Programming Inte...

Page 16: ...c 4 SFLASH_S_N RESET 6 nc Nc GND 2 10 7 7 Table 9 JTAG Programming Interface for LATTICE Function Extender 2x5 connector J4 TBD VCC 5v 1 2V 4 TBD TDO 3 TBD TDI 9 TBD TMS 5 TBD TCK 1 TBD INI 6 TBD AF 8...

Page 17: ...ing ON 1 2 3 4 OFF ON 1 2 3 4 OFF ON 1 2 3 4 OFF ON 1 2 3 4 OFF ON 1 2 3 4 OFF ON 1 2 3 4 OFF 1 2 3 4 OFF ON Update logic mode Xilinx JTAG interface mode Altera JTAG interface mode Lattice JTAG interf...

Page 18: ...ch as shipboard or military attachment THIS LIMITED WARRANTY IS IN LIEU OF ALL OTHER WARRANTIES EXPRESSED OR IMPLIED THE WARRANTIES PROVIDED HEREIN ARE BUYER S SOLE REMEDIES IN NO EVENT SHALL AMFELTEC...

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