American Megatrends Atlas PCI-II, User Manual

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Chapter 2 WINBIOS Setup 53
Chipset Setup,
Continued
16 Bit I/O Recovery This option specifies the length of the delay that
is added to the CPU cycle between consecutive 16-
bit I/O operations. The length of the delay is related
to the CPU type and frequency. The settings are
5
BCLK, 4 BCLK, 3 BCLK, or 2 BCLK. The Optimal
default setting is 2 BCLK . The Fail-Safe default
setting is 5 BCLK.
CPU To PCI Post Write This option specifies the length of a delay
inserted before a posted write from the CPU to the
PCI local bus. The settings are
Disabled, 4
CPUCLK , or 3 CPUCLK . The Optimal default
setting is 3 CPUCLK . The Fail-Safe default setting
is Disabled.
CPU To PCI Burst Write This option specifies the length of a delay
inserted before a burst write from the CPU to the
PCI local bus. The settings are
Disabled or
Enabled . The Optimal and Fail-Safe default settings
are Disabled.
Max Burst Range in PCI Master This option specifies the
maximum number of bytes that can be transferred in
the PCI Master channel. The settings are
256 bytes,
512 bytes, 1 KB, 2 KB, or 4 KB . The Optimal default
setting is 1 KB . The Fail-Safe default setting is 512
bytes.
PCI VGA Palette Snoop This option must be set to Enabled if any
ISA adapter card installed in the computer requires
VGA palette snooping.
The settings are Enabled or Disabled. The Optimal
and Fail-Safe default settings are Disabled.
Cont’d